1 /*
2 * linux/arch/arm/common/sa1111.c
3 *
4 * SA1111 support
5 *
6 * Original code by John Dorsey
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
12 * This file contains all generic SA1111 support.
13 *
14 * All initialization functions provided here are intended to be called
15 * from machine specific code with proper arguments when required.
16 */
17 #include <linux/module.h>
18 #include <linux/init.h>
19 #include <linux/irq.h>
20 #include <linux/kernel.h>
21 #include <linux/delay.h>
22 #include <linux/errno.h>
23 #include <linux/ioport.h>
24 #include <linux/platform_device.h>
25 #include <linux/slab.h>
26 #include <linux/spinlock.h>
27 #include <linux/dma-mapping.h>
28 #include <linux/clk.h>
29 #include <linux/io.h>
30
31 #include <mach/hardware.h>
32 #include <asm/mach/irq.h>
33 #include <asm/mach-types.h>
34 #include <asm/sizes.h>
35
36 #include <asm/hardware/sa1111.h>
37
38 /* SA1111 IRQs */
39 #define IRQ_GPAIN0 (0)
40 #define IRQ_GPAIN1 (1)
41 #define IRQ_GPAIN2 (2)
42 #define IRQ_GPAIN3 (3)
43 #define IRQ_GPBIN0 (4)
44 #define IRQ_GPBIN1 (5)
45 #define IRQ_GPBIN2 (6)
46 #define IRQ_GPBIN3 (7)
47 #define IRQ_GPBIN4 (8)
48 #define IRQ_GPBIN5 (9)
49 #define IRQ_GPCIN0 (10)
50 #define IRQ_GPCIN1 (11)
51 #define IRQ_GPCIN2 (12)
52 #define IRQ_GPCIN3 (13)
53 #define IRQ_GPCIN4 (14)
54 #define IRQ_GPCIN5 (15)
55 #define IRQ_GPCIN6 (16)
56 #define IRQ_GPCIN7 (17)
57 #define IRQ_MSTXINT (18)
58 #define IRQ_MSRXINT (19)
59 #define IRQ_MSSTOPERRINT (20)
60 #define IRQ_TPTXINT (21)
61 #define IRQ_TPRXINT (22)
62 #define IRQ_TPSTOPERRINT (23)
63 #define SSPXMTINT (24)
64 #define SSPRCVINT (25)
65 #define SSPROR (26)
66 #define AUDXMTDMADONEA (32)
67 #define AUDRCVDMADONEA (33)
68 #define AUDXMTDMADONEB (34)
69 #define AUDRCVDMADONEB (35)
70 #define AUDTFSR (36)
71 #define AUDRFSR (37)
72 #define AUDTUR (38)
73 #define AUDROR (39)
74 #define AUDDTS (40)
75 #define AUDRDD (41)
76 #define AUDSTO (42)
77 #define IRQ_USBPWR (43)
78 #define IRQ_HCIM (44)
79 #define IRQ_HCIBUFFACC (45)
80 #define IRQ_HCIRMTWKP (46)
81 #define IRQ_NHCIMFCIR (47)
82 #define IRQ_USB_PORT_RESUME (48)
83 #define IRQ_S0_READY_NINT (49)
84 #define IRQ_S1_READY_NINT (50)
85 #define IRQ_S0_CD_VALID (51)
86 #define IRQ_S1_CD_VALID (52)
87 #define IRQ_S0_BVD1_STSCHG (53)
88 #define IRQ_S1_BVD1_STSCHG (54)
89 #define SA1111_IRQ_NR (55)
90
91 extern void sa1110_mb_enable(void);
92 extern void sa1110_mb_disable(void);
93
94 /*
95 * We keep the following data for the overall SA1111. Note that the
96 * struct device and struct resource are "fake"; they should be supplied
97 * by the bus above us. However, in the interests of getting all SA1111
98 * drivers converted over to the device model, we provide this as an
99 * anchor point for all the other drivers.
100 */
101 struct sa1111 {
102 struct device *dev;
103 struct clk *clk;
104 unsigned long phys;
105 int irq;
106 int irq_base; /* base for cascaded on-chip IRQs */
107 spinlock_t lock;
108 void __iomem *base;
109 struct sa1111_platform_data *pdata;
110 #ifdef CONFIG_PM
111 void *saved_state;
112 #endif
113 };
114
115 /*
116 * We _really_ need to eliminate this. Its only users
117 * are the PWM and DMA checking code.
118 */
119 static struct sa1111 *g_sa1111;
120
121 struct sa1111_dev_info {
122 unsigned long offset;
123 unsigned long skpcr_mask;
124 bool dma;
125 unsigned int devid;
126 unsigned int irq[6];
127 };
128
129 static struct sa1111_dev_info sa1111_devices[] = {
130 {
131 .offset = SA1111_USB,
132 .skpcr_mask = SKPCR_UCLKEN,
133 .dma = true,
134 .devid = SA1111_DEVID_USB,
135 .irq = {
136 IRQ_USBPWR,
137 IRQ_HCIM,
138 IRQ_HCIBUFFACC,
139 IRQ_HCIRMTWKP,
140 IRQ_NHCIMFCIR,
141 IRQ_USB_PORT_RESUME
142 },
143 },
144 {
145 .offset = 0x0600,
146 .skpcr_mask = SKPCR_I2SCLKEN | SKPCR_L3CLKEN,
147 .dma = true,
148 .devid = SA1111_DEVID_SAC,
149 .irq = {
150 AUDXMTDMADONEA,
151 AUDXMTDMADONEB,
152 AUDRCVDMADONEA,
153 AUDRCVDMADONEB
154 },
155 },
156 {
157 .offset = 0x0800,
158 .skpcr_mask = SKPCR_SCLKEN,
159 .devid = SA1111_DEVID_SSP,
160 },
161 {
162 .offset = SA1111_KBD,
163 .skpcr_mask = SKPCR_PTCLKEN,
164 .devid = SA1111_DEVID_PS2_KBD,
165 .irq = {
166 IRQ_TPRXINT,
167 IRQ_TPTXINT
168 },
169 },
170 {
171 .offset = SA1111_MSE,
172 .skpcr_mask = SKPCR_PMCLKEN,
173 .devid = SA1111_DEVID_PS2_MSE,
174 .irq = {
175 IRQ_MSRXINT,
176 IRQ_MSTXINT
177 },
178 },
179 {
180 .offset = 0x1800,
181 .skpcr_mask = 0,
182 .devid = SA1111_DEVID_PCMCIA,
183 .irq = {
184 IRQ_S0_READY_NINT,
185 IRQ_S0_CD_VALID,
186 IRQ_S0_BVD1_STSCHG,
187 IRQ_S1_READY_NINT,
188 IRQ_S1_CD_VALID,
189 IRQ_S1_BVD1_STSCHG,
190 },
191 },
192 };
193
194 /*
195 * SA1111 interrupt support. Since clearing an IRQ while there are
196 * active IRQs causes the interrupt output to pulse, the upper levels
197 * will call us again if there are more interrupts to process.
198 */
199 static void
sa1111_irq_handler(unsigned int irq,struct irq_desc * desc)200 sa1111_irq_handler(unsigned int irq, struct irq_desc *desc)
201 {
202 unsigned int stat0, stat1, i;
203 struct sa1111 *sachip = irq_get_handler_data(irq);
204 void __iomem *mapbase = sachip->base + SA1111_INTC;
205
206 stat0 = sa1111_readl(mapbase + SA1111_INTSTATCLR0);
207 stat1 = sa1111_readl(mapbase + SA1111_INTSTATCLR1);
208
209 sa1111_writel(stat0, mapbase + SA1111_INTSTATCLR0);
210
211 desc->irq_data.chip->irq_ack(&desc->irq_data);
212
213 sa1111_writel(stat1, mapbase + SA1111_INTSTATCLR1);
214
215 if (stat0 == 0 && stat1 == 0) {
216 do_bad_IRQ(irq, desc);
217 return;
218 }
219
220 for (i = 0; stat0; i++, stat0 >>= 1)
221 if (stat0 & 1)
222 generic_handle_irq(i + sachip->irq_base);
223
224 for (i = 32; stat1; i++, stat1 >>= 1)
225 if (stat1 & 1)
226 generic_handle_irq(i + sachip->irq_base);
227
228 /* For level-based interrupts */
229 desc->irq_data.chip->irq_unmask(&desc->irq_data);
230 }
231
232 #define SA1111_IRQMASK_LO(x) (1 << (x - sachip->irq_base))
233 #define SA1111_IRQMASK_HI(x) (1 << (x - sachip->irq_base - 32))
234
sa1111_ack_irq(struct irq_data * d)235 static void sa1111_ack_irq(struct irq_data *d)
236 {
237 }
238
sa1111_mask_lowirq(struct irq_data * d)239 static void sa1111_mask_lowirq(struct irq_data *d)
240 {
241 struct sa1111 *sachip = irq_data_get_irq_chip_data(d);
242 void __iomem *mapbase = sachip->base + SA1111_INTC;
243 unsigned long ie0;
244
245 ie0 = sa1111_readl(mapbase + SA1111_INTEN0);
246 ie0 &= ~SA1111_IRQMASK_LO(d->irq);
247 writel(ie0, mapbase + SA1111_INTEN0);
248 }
249
sa1111_unmask_lowirq(struct irq_data * d)250 static void sa1111_unmask_lowirq(struct irq_data *d)
251 {
252 struct sa1111 *sachip = irq_data_get_irq_chip_data(d);
253 void __iomem *mapbase = sachip->base + SA1111_INTC;
254 unsigned long ie0;
255
256 ie0 = sa1111_readl(mapbase + SA1111_INTEN0);
257 ie0 |= SA1111_IRQMASK_LO(d->irq);
258 sa1111_writel(ie0, mapbase + SA1111_INTEN0);
259 }
260
261 /*
262 * Attempt to re-trigger the interrupt. The SA1111 contains a register
263 * (INTSET) which claims to do this. However, in practice no amount of
264 * manipulation of INTEN and INTSET guarantees that the interrupt will
265 * be triggered. In fact, its very difficult, if not impossible to get
266 * INTSET to re-trigger the interrupt.
267 */
sa1111_retrigger_lowirq(struct irq_data * d)268 static int sa1111_retrigger_lowirq(struct irq_data *d)
269 {
270 struct sa1111 *sachip = irq_data_get_irq_chip_data(d);
271 void __iomem *mapbase = sachip->base + SA1111_INTC;
272 unsigned int mask = SA1111_IRQMASK_LO(d->irq);
273 unsigned long ip0;
274 int i;
275
276 ip0 = sa1111_readl(mapbase + SA1111_INTPOL0);
277 for (i = 0; i < 8; i++) {
278 sa1111_writel(ip0 ^ mask, mapbase + SA1111_INTPOL0);
279 sa1111_writel(ip0, mapbase + SA1111_INTPOL0);
280 if (sa1111_readl(mapbase + SA1111_INTSTATCLR0) & mask)
281 break;
282 }
283
284 if (i == 8)
285 printk(KERN_ERR "Danger Will Robinson: failed to "
286 "re-trigger IRQ%d\n", d->irq);
287 return i == 8 ? -1 : 0;
288 }
289
sa1111_type_lowirq(struct irq_data * d,unsigned int flags)290 static int sa1111_type_lowirq(struct irq_data *d, unsigned int flags)
291 {
292 struct sa1111 *sachip = irq_data_get_irq_chip_data(d);
293 void __iomem *mapbase = sachip->base + SA1111_INTC;
294 unsigned int mask = SA1111_IRQMASK_LO(d->irq);
295 unsigned long ip0;
296
297 if (flags == IRQ_TYPE_PROBE)
298 return 0;
299
300 if ((!(flags & IRQ_TYPE_EDGE_RISING) ^ !(flags & IRQ_TYPE_EDGE_FALLING)) == 0)
301 return -EINVAL;
302
303 ip0 = sa1111_readl(mapbase + SA1111_INTPOL0);
304 if (flags & IRQ_TYPE_EDGE_RISING)
305 ip0 &= ~mask;
306 else
307 ip0 |= mask;
308 sa1111_writel(ip0, mapbase + SA1111_INTPOL0);
309 sa1111_writel(ip0, mapbase + SA1111_WAKEPOL0);
310
311 return 0;
312 }
313
sa1111_wake_lowirq(struct irq_data * d,unsigned int on)314 static int sa1111_wake_lowirq(struct irq_data *d, unsigned int on)
315 {
316 struct sa1111 *sachip = irq_data_get_irq_chip_data(d);
317 void __iomem *mapbase = sachip->base + SA1111_INTC;
318 unsigned int mask = SA1111_IRQMASK_LO(d->irq);
319 unsigned long we0;
320
321 we0 = sa1111_readl(mapbase + SA1111_WAKEEN0);
322 if (on)
323 we0 |= mask;
324 else
325 we0 &= ~mask;
326 sa1111_writel(we0, mapbase + SA1111_WAKEEN0);
327
328 return 0;
329 }
330
331 static struct irq_chip sa1111_low_chip = {
332 .name = "SA1111-l",
333 .irq_ack = sa1111_ack_irq,
334 .irq_mask = sa1111_mask_lowirq,
335 .irq_unmask = sa1111_unmask_lowirq,
336 .irq_retrigger = sa1111_retrigger_lowirq,
337 .irq_set_type = sa1111_type_lowirq,
338 .irq_set_wake = sa1111_wake_lowirq,
339 };
340
sa1111_mask_highirq(struct irq_data * d)341 static void sa1111_mask_highirq(struct irq_data *d)
342 {
343 struct sa1111 *sachip = irq_data_get_irq_chip_data(d);
344 void __iomem *mapbase = sachip->base + SA1111_INTC;
345 unsigned long ie1;
346
347 ie1 = sa1111_readl(mapbase + SA1111_INTEN1);
348 ie1 &= ~SA1111_IRQMASK_HI(d->irq);
349 sa1111_writel(ie1, mapbase + SA1111_INTEN1);
350 }
351
sa1111_unmask_highirq(struct irq_data * d)352 static void sa1111_unmask_highirq(struct irq_data *d)
353 {
354 struct sa1111 *sachip = irq_data_get_irq_chip_data(d);
355 void __iomem *mapbase = sachip->base + SA1111_INTC;
356 unsigned long ie1;
357
358 ie1 = sa1111_readl(mapbase + SA1111_INTEN1);
359 ie1 |= SA1111_IRQMASK_HI(d->irq);
360 sa1111_writel(ie1, mapbase + SA1111_INTEN1);
361 }
362
363 /*
364 * Attempt to re-trigger the interrupt. The SA1111 contains a register
365 * (INTSET) which claims to do this. However, in practice no amount of
366 * manipulation of INTEN and INTSET guarantees that the interrupt will
367 * be triggered. In fact, its very difficult, if not impossible to get
368 * INTSET to re-trigger the interrupt.
369 */
sa1111_retrigger_highirq(struct irq_data * d)370 static int sa1111_retrigger_highirq(struct irq_data *d)
371 {
372 struct sa1111 *sachip = irq_data_get_irq_chip_data(d);
373 void __iomem *mapbase = sachip->base + SA1111_INTC;
374 unsigned int mask = SA1111_IRQMASK_HI(d->irq);
375 unsigned long ip1;
376 int i;
377
378 ip1 = sa1111_readl(mapbase + SA1111_INTPOL1);
379 for (i = 0; i < 8; i++) {
380 sa1111_writel(ip1 ^ mask, mapbase + SA1111_INTPOL1);
381 sa1111_writel(ip1, mapbase + SA1111_INTPOL1);
382 if (sa1111_readl(mapbase + SA1111_INTSTATCLR1) & mask)
383 break;
384 }
385
386 if (i == 8)
387 printk(KERN_ERR "Danger Will Robinson: failed to "
388 "re-trigger IRQ%d\n", d->irq);
389 return i == 8 ? -1 : 0;
390 }
391
sa1111_type_highirq(struct irq_data * d,unsigned int flags)392 static int sa1111_type_highirq(struct irq_data *d, unsigned int flags)
393 {
394 struct sa1111 *sachip = irq_data_get_irq_chip_data(d);
395 void __iomem *mapbase = sachip->base + SA1111_INTC;
396 unsigned int mask = SA1111_IRQMASK_HI(d->irq);
397 unsigned long ip1;
398
399 if (flags == IRQ_TYPE_PROBE)
400 return 0;
401
402 if ((!(flags & IRQ_TYPE_EDGE_RISING) ^ !(flags & IRQ_TYPE_EDGE_FALLING)) == 0)
403 return -EINVAL;
404
405 ip1 = sa1111_readl(mapbase + SA1111_INTPOL1);
406 if (flags & IRQ_TYPE_EDGE_RISING)
407 ip1 &= ~mask;
408 else
409 ip1 |= mask;
410 sa1111_writel(ip1, mapbase + SA1111_INTPOL1);
411 sa1111_writel(ip1, mapbase + SA1111_WAKEPOL1);
412
413 return 0;
414 }
415
sa1111_wake_highirq(struct irq_data * d,unsigned int on)416 static int sa1111_wake_highirq(struct irq_data *d, unsigned int on)
417 {
418 struct sa1111 *sachip = irq_data_get_irq_chip_data(d);
419 void __iomem *mapbase = sachip->base + SA1111_INTC;
420 unsigned int mask = SA1111_IRQMASK_HI(d->irq);
421 unsigned long we1;
422
423 we1 = sa1111_readl(mapbase + SA1111_WAKEEN1);
424 if (on)
425 we1 |= mask;
426 else
427 we1 &= ~mask;
428 sa1111_writel(we1, mapbase + SA1111_WAKEEN1);
429
430 return 0;
431 }
432
433 static struct irq_chip sa1111_high_chip = {
434 .name = "SA1111-h",
435 .irq_ack = sa1111_ack_irq,
436 .irq_mask = sa1111_mask_highirq,
437 .irq_unmask = sa1111_unmask_highirq,
438 .irq_retrigger = sa1111_retrigger_highirq,
439 .irq_set_type = sa1111_type_highirq,
440 .irq_set_wake = sa1111_wake_highirq,
441 };
442
sa1111_setup_irq(struct sa1111 * sachip,unsigned irq_base)443 static int sa1111_setup_irq(struct sa1111 *sachip, unsigned irq_base)
444 {
445 void __iomem *irqbase = sachip->base + SA1111_INTC;
446 unsigned i, irq;
447 int ret;
448
449 /*
450 * We're guaranteed that this region hasn't been taken.
451 */
452 request_mem_region(sachip->phys + SA1111_INTC, 512, "irq");
453
454 ret = irq_alloc_descs(-1, irq_base, SA1111_IRQ_NR, -1);
455 if (ret <= 0) {
456 dev_err(sachip->dev, "unable to allocate %u irqs: %d\n",
457 SA1111_IRQ_NR, ret);
458 if (ret == 0)
459 ret = -EINVAL;
460 return ret;
461 }
462
463 sachip->irq_base = ret;
464
465 /* disable all IRQs */
466 sa1111_writel(0, irqbase + SA1111_INTEN0);
467 sa1111_writel(0, irqbase + SA1111_INTEN1);
468 sa1111_writel(0, irqbase + SA1111_WAKEEN0);
469 sa1111_writel(0, irqbase + SA1111_WAKEEN1);
470
471 /*
472 * detect on rising edge. Note: Feb 2001 Errata for SA1111
473 * specifies that S0ReadyInt and S1ReadyInt should be '1'.
474 */
475 sa1111_writel(0, irqbase + SA1111_INTPOL0);
476 sa1111_writel(SA1111_IRQMASK_HI(IRQ_S0_READY_NINT) |
477 SA1111_IRQMASK_HI(IRQ_S1_READY_NINT),
478 irqbase + SA1111_INTPOL1);
479
480 /* clear all IRQs */
481 sa1111_writel(~0, irqbase + SA1111_INTSTATCLR0);
482 sa1111_writel(~0, irqbase + SA1111_INTSTATCLR1);
483
484 for (i = IRQ_GPAIN0; i <= SSPROR; i++) {
485 irq = sachip->irq_base + i;
486 irq_set_chip_and_handler(irq, &sa1111_low_chip,
487 handle_edge_irq);
488 irq_set_chip_data(irq, sachip);
489 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
490 }
491
492 for (i = AUDXMTDMADONEA; i <= IRQ_S1_BVD1_STSCHG; i++) {
493 irq = sachip->irq_base + i;
494 irq_set_chip_and_handler(irq, &sa1111_high_chip,
495 handle_edge_irq);
496 irq_set_chip_data(irq, sachip);
497 set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
498 }
499
500 /*
501 * Register SA1111 interrupt
502 */
503 irq_set_irq_type(sachip->irq, IRQ_TYPE_EDGE_RISING);
504 irq_set_handler_data(sachip->irq, sachip);
505 irq_set_chained_handler(sachip->irq, sa1111_irq_handler);
506
507 dev_info(sachip->dev, "Providing IRQ%u-%u\n",
508 sachip->irq_base, sachip->irq_base + SA1111_IRQ_NR - 1);
509
510 return 0;
511 }
512
513 /*
514 * Bring the SA1111 out of reset. This requires a set procedure:
515 * 1. nRESET asserted (by hardware)
516 * 2. CLK turned on from SA1110
517 * 3. nRESET deasserted
518 * 4. VCO turned on, PLL_BYPASS turned off
519 * 5. Wait lock time, then assert RCLKEn
520 * 7. PCR set to allow clocking of individual functions
521 *
522 * Until we've done this, the only registers we can access are:
523 * SBI_SKCR
524 * SBI_SMCR
525 * SBI_SKID
526 */
sa1111_wake(struct sa1111 * sachip)527 static void sa1111_wake(struct sa1111 *sachip)
528 {
529 unsigned long flags, r;
530
531 spin_lock_irqsave(&sachip->lock, flags);
532
533 clk_enable(sachip->clk);
534
535 /*
536 * Turn VCO on, and disable PLL Bypass.
537 */
538 r = sa1111_readl(sachip->base + SA1111_SKCR);
539 r &= ~SKCR_VCO_OFF;
540 sa1111_writel(r, sachip->base + SA1111_SKCR);
541 r |= SKCR_PLL_BYPASS | SKCR_OE_EN;
542 sa1111_writel(r, sachip->base + SA1111_SKCR);
543
544 /*
545 * Wait lock time. SA1111 manual _doesn't_
546 * specify a figure for this! We choose 100us.
547 */
548 udelay(100);
549
550 /*
551 * Enable RCLK. We also ensure that RDYEN is set.
552 */
553 r |= SKCR_RCLKEN | SKCR_RDYEN;
554 sa1111_writel(r, sachip->base + SA1111_SKCR);
555
556 /*
557 * Wait 14 RCLK cycles for the chip to finish coming out
558 * of reset. (RCLK=24MHz). This is 590ns.
559 */
560 udelay(1);
561
562 /*
563 * Ensure all clocks are initially off.
564 */
565 sa1111_writel(0, sachip->base + SA1111_SKPCR);
566
567 spin_unlock_irqrestore(&sachip->lock, flags);
568 }
569
570 #ifdef CONFIG_ARCH_SA1100
571
572 static u32 sa1111_dma_mask[] = {
573 ~0,
574 ~(1 << 20),
575 ~(1 << 23),
576 ~(1 << 24),
577 ~(1 << 25),
578 ~(1 << 20),
579 ~(1 << 20),
580 0,
581 };
582
583 /*
584 * Configure the SA1111 shared memory controller.
585 */
586 void
sa1111_configure_smc(struct sa1111 * sachip,int sdram,unsigned int drac,unsigned int cas_latency)587 sa1111_configure_smc(struct sa1111 *sachip, int sdram, unsigned int drac,
588 unsigned int cas_latency)
589 {
590 unsigned int smcr = SMCR_DTIM | SMCR_MBGE | FInsrt(drac, SMCR_DRAC);
591
592 if (cas_latency == 3)
593 smcr |= SMCR_CLAT;
594
595 sa1111_writel(smcr, sachip->base + SA1111_SMCR);
596
597 /*
598 * Now clear the bits in the DMA mask to work around the SA1111
599 * DMA erratum (Intel StrongARM SA-1111 Microprocessor Companion
600 * Chip Specification Update, June 2000, Erratum #7).
601 */
602 if (sachip->dev->dma_mask)
603 *sachip->dev->dma_mask &= sa1111_dma_mask[drac >> 2];
604
605 sachip->dev->coherent_dma_mask &= sa1111_dma_mask[drac >> 2];
606 }
607 #endif
608
sa1111_dev_release(struct device * _dev)609 static void sa1111_dev_release(struct device *_dev)
610 {
611 struct sa1111_dev *dev = SA1111_DEV(_dev);
612
613 kfree(dev);
614 }
615
616 static int
sa1111_init_one_child(struct sa1111 * sachip,struct resource * parent,struct sa1111_dev_info * info)617 sa1111_init_one_child(struct sa1111 *sachip, struct resource *parent,
618 struct sa1111_dev_info *info)
619 {
620 struct sa1111_dev *dev;
621 unsigned i;
622 int ret;
623
624 dev = kzalloc(sizeof(struct sa1111_dev), GFP_KERNEL);
625 if (!dev) {
626 ret = -ENOMEM;
627 goto err_alloc;
628 }
629
630 device_initialize(&dev->dev);
631 dev_set_name(&dev->dev, "%4.4lx", info->offset);
632 dev->devid = info->devid;
633 dev->dev.parent = sachip->dev;
634 dev->dev.bus = &sa1111_bus_type;
635 dev->dev.release = sa1111_dev_release;
636 dev->res.start = sachip->phys + info->offset;
637 dev->res.end = dev->res.start + 511;
638 dev->res.name = dev_name(&dev->dev);
639 dev->res.flags = IORESOURCE_MEM;
640 dev->mapbase = sachip->base + info->offset;
641 dev->skpcr_mask = info->skpcr_mask;
642
643 for (i = 0; i < ARRAY_SIZE(info->irq); i++)
644 dev->irq[i] = sachip->irq_base + info->irq[i];
645
646 /*
647 * If the parent device has a DMA mask associated with it, and
648 * this child supports DMA, propagate it down to the children.
649 */
650 if (info->dma && sachip->dev->dma_mask) {
651 dev->dma_mask = *sachip->dev->dma_mask;
652 dev->dev.dma_mask = &dev->dma_mask;
653 dev->dev.coherent_dma_mask = sachip->dev->coherent_dma_mask;
654 }
655
656 ret = request_resource(parent, &dev->res);
657 if (ret) {
658 dev_err(sachip->dev, "failed to allocate resource for %s\n",
659 dev->res.name);
660 goto err_resource;
661 }
662
663 ret = device_add(&dev->dev);
664 if (ret)
665 goto err_add;
666 return 0;
667
668 err_add:
669 release_resource(&dev->res);
670 err_resource:
671 put_device(&dev->dev);
672 err_alloc:
673 return ret;
674 }
675
676 /**
677 * sa1111_probe - probe for a single SA1111 chip.
678 * @phys_addr: physical address of device.
679 *
680 * Probe for a SA1111 chip. This must be called
681 * before any other SA1111-specific code.
682 *
683 * Returns:
684 * %-ENODEV device not found.
685 * %-EBUSY physical address already marked in-use.
686 * %-EINVAL no platform data passed
687 * %0 successful.
688 */
689 static int __devinit
__sa1111_probe(struct device * me,struct resource * mem,int irq)690 __sa1111_probe(struct device *me, struct resource *mem, int irq)
691 {
692 struct sa1111_platform_data *pd = me->platform_data;
693 struct sa1111 *sachip;
694 unsigned long id;
695 unsigned int has_devs;
696 int i, ret = -ENODEV;
697
698 if (!pd)
699 return -EINVAL;
700
701 sachip = kzalloc(sizeof(struct sa1111), GFP_KERNEL);
702 if (!sachip)
703 return -ENOMEM;
704
705 sachip->clk = clk_get(me, "SA1111_CLK");
706 if (IS_ERR(sachip->clk)) {
707 ret = PTR_ERR(sachip->clk);
708 goto err_free;
709 }
710
711 ret = clk_prepare(sachip->clk);
712 if (ret)
713 goto err_clkput;
714
715 spin_lock_init(&sachip->lock);
716
717 sachip->dev = me;
718 dev_set_drvdata(sachip->dev, sachip);
719
720 sachip->pdata = pd;
721 sachip->phys = mem->start;
722 sachip->irq = irq;
723
724 /*
725 * Map the whole region. This also maps the
726 * registers for our children.
727 */
728 sachip->base = ioremap(mem->start, PAGE_SIZE * 2);
729 if (!sachip->base) {
730 ret = -ENOMEM;
731 goto err_clk_unprep;
732 }
733
734 /*
735 * Probe for the chip. Only touch the SBI registers.
736 */
737 id = sa1111_readl(sachip->base + SA1111_SKID);
738 if ((id & SKID_ID_MASK) != SKID_SA1111_ID) {
739 printk(KERN_DEBUG "SA1111 not detected: ID = %08lx\n", id);
740 ret = -ENODEV;
741 goto err_unmap;
742 }
743
744 printk(KERN_INFO "SA1111 Microprocessor Companion Chip: "
745 "silicon revision %lx, metal revision %lx\n",
746 (id & SKID_SIREV_MASK)>>4, (id & SKID_MTREV_MASK));
747
748 /*
749 * We found it. Wake the chip up, and initialise.
750 */
751 sa1111_wake(sachip);
752
753 /*
754 * The interrupt controller must be initialised before any
755 * other device to ensure that the interrupts are available.
756 */
757 if (sachip->irq != NO_IRQ) {
758 ret = sa1111_setup_irq(sachip, pd->irq_base);
759 if (ret)
760 goto err_unmap;
761 }
762
763 #ifdef CONFIG_ARCH_SA1100
764 {
765 unsigned int val;
766
767 /*
768 * The SDRAM configuration of the SA1110 and the SA1111 must
769 * match. This is very important to ensure that SA1111 accesses
770 * don't corrupt the SDRAM. Note that this ungates the SA1111's
771 * MBGNT signal, so we must have called sa1110_mb_disable()
772 * beforehand.
773 */
774 sa1111_configure_smc(sachip, 1,
775 FExtr(MDCNFG, MDCNFG_SA1110_DRAC0),
776 FExtr(MDCNFG, MDCNFG_SA1110_TDL0));
777
778 /*
779 * We only need to turn on DCLK whenever we want to use the
780 * DMA. It can otherwise be held firmly in the off position.
781 * (currently, we always enable it.)
782 */
783 val = sa1111_readl(sachip->base + SA1111_SKPCR);
784 sa1111_writel(val | SKPCR_DCLKEN, sachip->base + SA1111_SKPCR);
785
786 /*
787 * Enable the SA1110 memory bus request and grant signals.
788 */
789 sa1110_mb_enable();
790 }
791 #endif
792
793 g_sa1111 = sachip;
794
795 has_devs = ~0;
796 if (pd)
797 has_devs &= ~pd->disable_devs;
798
799 for (i = 0; i < ARRAY_SIZE(sa1111_devices); i++)
800 if (sa1111_devices[i].devid & has_devs)
801 sa1111_init_one_child(sachip, mem, &sa1111_devices[i]);
802
803 return 0;
804
805 err_unmap:
806 iounmap(sachip->base);
807 err_clk_unprep:
808 clk_unprepare(sachip->clk);
809 err_clkput:
810 clk_put(sachip->clk);
811 err_free:
812 kfree(sachip);
813 return ret;
814 }
815
sa1111_remove_one(struct device * dev,void * data)816 static int sa1111_remove_one(struct device *dev, void *data)
817 {
818 struct sa1111_dev *sadev = SA1111_DEV(dev);
819 device_del(&sadev->dev);
820 release_resource(&sadev->res);
821 put_device(&sadev->dev);
822 return 0;
823 }
824
__sa1111_remove(struct sa1111 * sachip)825 static void __sa1111_remove(struct sa1111 *sachip)
826 {
827 void __iomem *irqbase = sachip->base + SA1111_INTC;
828
829 device_for_each_child(sachip->dev, NULL, sa1111_remove_one);
830
831 /* disable all IRQs */
832 sa1111_writel(0, irqbase + SA1111_INTEN0);
833 sa1111_writel(0, irqbase + SA1111_INTEN1);
834 sa1111_writel(0, irqbase + SA1111_WAKEEN0);
835 sa1111_writel(0, irqbase + SA1111_WAKEEN1);
836
837 clk_disable(sachip->clk);
838 clk_unprepare(sachip->clk);
839
840 if (sachip->irq != NO_IRQ) {
841 irq_set_chained_handler(sachip->irq, NULL);
842 irq_set_handler_data(sachip->irq, NULL);
843 irq_free_descs(sachip->irq_base, SA1111_IRQ_NR);
844
845 release_mem_region(sachip->phys + SA1111_INTC, 512);
846 }
847
848 iounmap(sachip->base);
849 clk_put(sachip->clk);
850 kfree(sachip);
851 }
852
853 struct sa1111_save_data {
854 unsigned int skcr;
855 unsigned int skpcr;
856 unsigned int skcdr;
857 unsigned char skaud;
858 unsigned char skpwm0;
859 unsigned char skpwm1;
860
861 /*
862 * Interrupt controller
863 */
864 unsigned int intpol0;
865 unsigned int intpol1;
866 unsigned int inten0;
867 unsigned int inten1;
868 unsigned int wakepol0;
869 unsigned int wakepol1;
870 unsigned int wakeen0;
871 unsigned int wakeen1;
872 };
873
874 #ifdef CONFIG_PM
875
sa1111_suspend(struct platform_device * dev,pm_message_t state)876 static int sa1111_suspend(struct platform_device *dev, pm_message_t state)
877 {
878 struct sa1111 *sachip = platform_get_drvdata(dev);
879 struct sa1111_save_data *save;
880 unsigned long flags;
881 unsigned int val;
882 void __iomem *base;
883
884 save = kmalloc(sizeof(struct sa1111_save_data), GFP_KERNEL);
885 if (!save)
886 return -ENOMEM;
887 sachip->saved_state = save;
888
889 spin_lock_irqsave(&sachip->lock, flags);
890
891 /*
892 * Save state.
893 */
894 base = sachip->base;
895 save->skcr = sa1111_readl(base + SA1111_SKCR);
896 save->skpcr = sa1111_readl(base + SA1111_SKPCR);
897 save->skcdr = sa1111_readl(base + SA1111_SKCDR);
898 save->skaud = sa1111_readl(base + SA1111_SKAUD);
899 save->skpwm0 = sa1111_readl(base + SA1111_SKPWM0);
900 save->skpwm1 = sa1111_readl(base + SA1111_SKPWM1);
901
902 sa1111_writel(0, sachip->base + SA1111_SKPWM0);
903 sa1111_writel(0, sachip->base + SA1111_SKPWM1);
904
905 base = sachip->base + SA1111_INTC;
906 save->intpol0 = sa1111_readl(base + SA1111_INTPOL0);
907 save->intpol1 = sa1111_readl(base + SA1111_INTPOL1);
908 save->inten0 = sa1111_readl(base + SA1111_INTEN0);
909 save->inten1 = sa1111_readl(base + SA1111_INTEN1);
910 save->wakepol0 = sa1111_readl(base + SA1111_WAKEPOL0);
911 save->wakepol1 = sa1111_readl(base + SA1111_WAKEPOL1);
912 save->wakeen0 = sa1111_readl(base + SA1111_WAKEEN0);
913 save->wakeen1 = sa1111_readl(base + SA1111_WAKEEN1);
914
915 /*
916 * Disable.
917 */
918 val = sa1111_readl(sachip->base + SA1111_SKCR);
919 sa1111_writel(val | SKCR_SLEEP, sachip->base + SA1111_SKCR);
920
921 clk_disable(sachip->clk);
922
923 spin_unlock_irqrestore(&sachip->lock, flags);
924
925 #ifdef CONFIG_ARCH_SA1100
926 sa1110_mb_disable();
927 #endif
928
929 return 0;
930 }
931
932 /*
933 * sa1111_resume - Restore the SA1111 device state.
934 * @dev: device to restore
935 *
936 * Restore the general state of the SA1111; clock control and
937 * interrupt controller. Other parts of the SA1111 must be
938 * restored by their respective drivers, and must be called
939 * via LDM after this function.
940 */
sa1111_resume(struct platform_device * dev)941 static int sa1111_resume(struct platform_device *dev)
942 {
943 struct sa1111 *sachip = platform_get_drvdata(dev);
944 struct sa1111_save_data *save;
945 unsigned long flags, id;
946 void __iomem *base;
947
948 save = sachip->saved_state;
949 if (!save)
950 return 0;
951
952 /*
953 * Ensure that the SA1111 is still here.
954 * FIXME: shouldn't do this here.
955 */
956 id = sa1111_readl(sachip->base + SA1111_SKID);
957 if ((id & SKID_ID_MASK) != SKID_SA1111_ID) {
958 __sa1111_remove(sachip);
959 platform_set_drvdata(dev, NULL);
960 kfree(save);
961 return 0;
962 }
963
964 /*
965 * First of all, wake up the chip.
966 */
967 sa1111_wake(sachip);
968
969 #ifdef CONFIG_ARCH_SA1100
970 /* Enable the memory bus request/grant signals */
971 sa1110_mb_enable();
972 #endif
973
974 /*
975 * Only lock for write ops. Also, sa1111_wake must be called with
976 * released spinlock!
977 */
978 spin_lock_irqsave(&sachip->lock, flags);
979
980 sa1111_writel(0, sachip->base + SA1111_INTC + SA1111_INTEN0);
981 sa1111_writel(0, sachip->base + SA1111_INTC + SA1111_INTEN1);
982
983 base = sachip->base;
984 sa1111_writel(save->skcr, base + SA1111_SKCR);
985 sa1111_writel(save->skpcr, base + SA1111_SKPCR);
986 sa1111_writel(save->skcdr, base + SA1111_SKCDR);
987 sa1111_writel(save->skaud, base + SA1111_SKAUD);
988 sa1111_writel(save->skpwm0, base + SA1111_SKPWM0);
989 sa1111_writel(save->skpwm1, base + SA1111_SKPWM1);
990
991 base = sachip->base + SA1111_INTC;
992 sa1111_writel(save->intpol0, base + SA1111_INTPOL0);
993 sa1111_writel(save->intpol1, base + SA1111_INTPOL1);
994 sa1111_writel(save->inten0, base + SA1111_INTEN0);
995 sa1111_writel(save->inten1, base + SA1111_INTEN1);
996 sa1111_writel(save->wakepol0, base + SA1111_WAKEPOL0);
997 sa1111_writel(save->wakepol1, base + SA1111_WAKEPOL1);
998 sa1111_writel(save->wakeen0, base + SA1111_WAKEEN0);
999 sa1111_writel(save->wakeen1, base + SA1111_WAKEEN1);
1000
1001 spin_unlock_irqrestore(&sachip->lock, flags);
1002
1003 sachip->saved_state = NULL;
1004 kfree(save);
1005
1006 return 0;
1007 }
1008
1009 #else
1010 #define sa1111_suspend NULL
1011 #define sa1111_resume NULL
1012 #endif
1013
sa1111_probe(struct platform_device * pdev)1014 static int __devinit sa1111_probe(struct platform_device *pdev)
1015 {
1016 struct resource *mem;
1017 int irq;
1018
1019 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1020 if (!mem)
1021 return -EINVAL;
1022 irq = platform_get_irq(pdev, 0);
1023 if (irq < 0)
1024 return -ENXIO;
1025
1026 return __sa1111_probe(&pdev->dev, mem, irq);
1027 }
1028
sa1111_remove(struct platform_device * pdev)1029 static int sa1111_remove(struct platform_device *pdev)
1030 {
1031 struct sa1111 *sachip = platform_get_drvdata(pdev);
1032
1033 if (sachip) {
1034 #ifdef CONFIG_PM
1035 kfree(sachip->saved_state);
1036 sachip->saved_state = NULL;
1037 #endif
1038 __sa1111_remove(sachip);
1039 platform_set_drvdata(pdev, NULL);
1040 }
1041
1042 return 0;
1043 }
1044
1045 /*
1046 * Not sure if this should be on the system bus or not yet.
1047 * We really want some way to register a system device at
1048 * the per-machine level, and then have this driver pick
1049 * up the registered devices.
1050 *
1051 * We also need to handle the SDRAM configuration for
1052 * PXA250/SA1110 machine classes.
1053 */
1054 static struct platform_driver sa1111_device_driver = {
1055 .probe = sa1111_probe,
1056 .remove = sa1111_remove,
1057 .suspend = sa1111_suspend,
1058 .resume = sa1111_resume,
1059 .driver = {
1060 .name = "sa1111",
1061 .owner = THIS_MODULE,
1062 },
1063 };
1064
1065 /*
1066 * Get the parent device driver (us) structure
1067 * from a child function device
1068 */
sa1111_chip_driver(struct sa1111_dev * sadev)1069 static inline struct sa1111 *sa1111_chip_driver(struct sa1111_dev *sadev)
1070 {
1071 return (struct sa1111 *)dev_get_drvdata(sadev->dev.parent);
1072 }
1073
1074 /*
1075 * The bits in the opdiv field are non-linear.
1076 */
1077 static unsigned char opdiv_table[] = { 1, 4, 2, 8 };
1078
__sa1111_pll_clock(struct sa1111 * sachip)1079 static unsigned int __sa1111_pll_clock(struct sa1111 *sachip)
1080 {
1081 unsigned int skcdr, fbdiv, ipdiv, opdiv;
1082
1083 skcdr = sa1111_readl(sachip->base + SA1111_SKCDR);
1084
1085 fbdiv = (skcdr & 0x007f) + 2;
1086 ipdiv = ((skcdr & 0x0f80) >> 7) + 2;
1087 opdiv = opdiv_table[(skcdr & 0x3000) >> 12];
1088
1089 return 3686400 * fbdiv / (ipdiv * opdiv);
1090 }
1091
1092 /**
1093 * sa1111_pll_clock - return the current PLL clock frequency.
1094 * @sadev: SA1111 function block
1095 *
1096 * BUG: we should look at SKCR. We also blindly believe that
1097 * the chip is being fed with the 3.6864MHz clock.
1098 *
1099 * Returns the PLL clock in Hz.
1100 */
sa1111_pll_clock(struct sa1111_dev * sadev)1101 unsigned int sa1111_pll_clock(struct sa1111_dev *sadev)
1102 {
1103 struct sa1111 *sachip = sa1111_chip_driver(sadev);
1104
1105 return __sa1111_pll_clock(sachip);
1106 }
1107 EXPORT_SYMBOL(sa1111_pll_clock);
1108
1109 /**
1110 * sa1111_select_audio_mode - select I2S or AC link mode
1111 * @sadev: SA1111 function block
1112 * @mode: One of %SA1111_AUDIO_ACLINK or %SA1111_AUDIO_I2S
1113 *
1114 * Frob the SKCR to select AC Link mode or I2S mode for
1115 * the audio block.
1116 */
sa1111_select_audio_mode(struct sa1111_dev * sadev,int mode)1117 void sa1111_select_audio_mode(struct sa1111_dev *sadev, int mode)
1118 {
1119 struct sa1111 *sachip = sa1111_chip_driver(sadev);
1120 unsigned long flags;
1121 unsigned int val;
1122
1123 spin_lock_irqsave(&sachip->lock, flags);
1124
1125 val = sa1111_readl(sachip->base + SA1111_SKCR);
1126 if (mode == SA1111_AUDIO_I2S) {
1127 val &= ~SKCR_SELAC;
1128 } else {
1129 val |= SKCR_SELAC;
1130 }
1131 sa1111_writel(val, sachip->base + SA1111_SKCR);
1132
1133 spin_unlock_irqrestore(&sachip->lock, flags);
1134 }
1135 EXPORT_SYMBOL(sa1111_select_audio_mode);
1136
1137 /**
1138 * sa1111_set_audio_rate - set the audio sample rate
1139 * @sadev: SA1111 SAC function block
1140 * @rate: sample rate to select
1141 */
sa1111_set_audio_rate(struct sa1111_dev * sadev,int rate)1142 int sa1111_set_audio_rate(struct sa1111_dev *sadev, int rate)
1143 {
1144 struct sa1111 *sachip = sa1111_chip_driver(sadev);
1145 unsigned int div;
1146
1147 if (sadev->devid != SA1111_DEVID_SAC)
1148 return -EINVAL;
1149
1150 div = (__sa1111_pll_clock(sachip) / 256 + rate / 2) / rate;
1151 if (div == 0)
1152 div = 1;
1153 if (div > 128)
1154 div = 128;
1155
1156 sa1111_writel(div - 1, sachip->base + SA1111_SKAUD);
1157
1158 return 0;
1159 }
1160 EXPORT_SYMBOL(sa1111_set_audio_rate);
1161
1162 /**
1163 * sa1111_get_audio_rate - get the audio sample rate
1164 * @sadev: SA1111 SAC function block device
1165 */
sa1111_get_audio_rate(struct sa1111_dev * sadev)1166 int sa1111_get_audio_rate(struct sa1111_dev *sadev)
1167 {
1168 struct sa1111 *sachip = sa1111_chip_driver(sadev);
1169 unsigned long div;
1170
1171 if (sadev->devid != SA1111_DEVID_SAC)
1172 return -EINVAL;
1173
1174 div = sa1111_readl(sachip->base + SA1111_SKAUD) + 1;
1175
1176 return __sa1111_pll_clock(sachip) / (256 * div);
1177 }
1178 EXPORT_SYMBOL(sa1111_get_audio_rate);
1179
sa1111_set_io_dir(struct sa1111_dev * sadev,unsigned int bits,unsigned int dir,unsigned int sleep_dir)1180 void sa1111_set_io_dir(struct sa1111_dev *sadev,
1181 unsigned int bits, unsigned int dir,
1182 unsigned int sleep_dir)
1183 {
1184 struct sa1111 *sachip = sa1111_chip_driver(sadev);
1185 unsigned long flags;
1186 unsigned int val;
1187 void __iomem *gpio = sachip->base + SA1111_GPIO;
1188
1189 #define MODIFY_BITS(port, mask, dir) \
1190 if (mask) { \
1191 val = sa1111_readl(port); \
1192 val &= ~(mask); \
1193 val |= (dir) & (mask); \
1194 sa1111_writel(val, port); \
1195 }
1196
1197 spin_lock_irqsave(&sachip->lock, flags);
1198 MODIFY_BITS(gpio + SA1111_GPIO_PADDR, bits & 15, dir);
1199 MODIFY_BITS(gpio + SA1111_GPIO_PBDDR, (bits >> 8) & 255, dir >> 8);
1200 MODIFY_BITS(gpio + SA1111_GPIO_PCDDR, (bits >> 16) & 255, dir >> 16);
1201
1202 MODIFY_BITS(gpio + SA1111_GPIO_PASDR, bits & 15, sleep_dir);
1203 MODIFY_BITS(gpio + SA1111_GPIO_PBSDR, (bits >> 8) & 255, sleep_dir >> 8);
1204 MODIFY_BITS(gpio + SA1111_GPIO_PCSDR, (bits >> 16) & 255, sleep_dir >> 16);
1205 spin_unlock_irqrestore(&sachip->lock, flags);
1206 }
1207 EXPORT_SYMBOL(sa1111_set_io_dir);
1208
sa1111_set_io(struct sa1111_dev * sadev,unsigned int bits,unsigned int v)1209 void sa1111_set_io(struct sa1111_dev *sadev, unsigned int bits, unsigned int v)
1210 {
1211 struct sa1111 *sachip = sa1111_chip_driver(sadev);
1212 unsigned long flags;
1213 unsigned int val;
1214 void __iomem *gpio = sachip->base + SA1111_GPIO;
1215
1216 spin_lock_irqsave(&sachip->lock, flags);
1217 MODIFY_BITS(gpio + SA1111_GPIO_PADWR, bits & 15, v);
1218 MODIFY_BITS(gpio + SA1111_GPIO_PBDWR, (bits >> 8) & 255, v >> 8);
1219 MODIFY_BITS(gpio + SA1111_GPIO_PCDWR, (bits >> 16) & 255, v >> 16);
1220 spin_unlock_irqrestore(&sachip->lock, flags);
1221 }
1222 EXPORT_SYMBOL(sa1111_set_io);
1223
sa1111_set_sleep_io(struct sa1111_dev * sadev,unsigned int bits,unsigned int v)1224 void sa1111_set_sleep_io(struct sa1111_dev *sadev, unsigned int bits, unsigned int v)
1225 {
1226 struct sa1111 *sachip = sa1111_chip_driver(sadev);
1227 unsigned long flags;
1228 unsigned int val;
1229 void __iomem *gpio = sachip->base + SA1111_GPIO;
1230
1231 spin_lock_irqsave(&sachip->lock, flags);
1232 MODIFY_BITS(gpio + SA1111_GPIO_PASSR, bits & 15, v);
1233 MODIFY_BITS(gpio + SA1111_GPIO_PBSSR, (bits >> 8) & 255, v >> 8);
1234 MODIFY_BITS(gpio + SA1111_GPIO_PCSSR, (bits >> 16) & 255, v >> 16);
1235 spin_unlock_irqrestore(&sachip->lock, flags);
1236 }
1237 EXPORT_SYMBOL(sa1111_set_sleep_io);
1238
1239 /*
1240 * Individual device operations.
1241 */
1242
1243 /**
1244 * sa1111_enable_device - enable an on-chip SA1111 function block
1245 * @sadev: SA1111 function block device to enable
1246 */
sa1111_enable_device(struct sa1111_dev * sadev)1247 int sa1111_enable_device(struct sa1111_dev *sadev)
1248 {
1249 struct sa1111 *sachip = sa1111_chip_driver(sadev);
1250 unsigned long flags;
1251 unsigned int val;
1252 int ret = 0;
1253
1254 if (sachip->pdata && sachip->pdata->enable)
1255 ret = sachip->pdata->enable(sachip->pdata->data, sadev->devid);
1256
1257 if (ret == 0) {
1258 spin_lock_irqsave(&sachip->lock, flags);
1259 val = sa1111_readl(sachip->base + SA1111_SKPCR);
1260 sa1111_writel(val | sadev->skpcr_mask, sachip->base + SA1111_SKPCR);
1261 spin_unlock_irqrestore(&sachip->lock, flags);
1262 }
1263 return ret;
1264 }
1265 EXPORT_SYMBOL(sa1111_enable_device);
1266
1267 /**
1268 * sa1111_disable_device - disable an on-chip SA1111 function block
1269 * @sadev: SA1111 function block device to disable
1270 */
sa1111_disable_device(struct sa1111_dev * sadev)1271 void sa1111_disable_device(struct sa1111_dev *sadev)
1272 {
1273 struct sa1111 *sachip = sa1111_chip_driver(sadev);
1274 unsigned long flags;
1275 unsigned int val;
1276
1277 spin_lock_irqsave(&sachip->lock, flags);
1278 val = sa1111_readl(sachip->base + SA1111_SKPCR);
1279 sa1111_writel(val & ~sadev->skpcr_mask, sachip->base + SA1111_SKPCR);
1280 spin_unlock_irqrestore(&sachip->lock, flags);
1281
1282 if (sachip->pdata && sachip->pdata->disable)
1283 sachip->pdata->disable(sachip->pdata->data, sadev->devid);
1284 }
1285 EXPORT_SYMBOL(sa1111_disable_device);
1286
1287 /*
1288 * SA1111 "Register Access Bus."
1289 *
1290 * We model this as a regular bus type, and hang devices directly
1291 * off this.
1292 */
sa1111_match(struct device * _dev,struct device_driver * _drv)1293 static int sa1111_match(struct device *_dev, struct device_driver *_drv)
1294 {
1295 struct sa1111_dev *dev = SA1111_DEV(_dev);
1296 struct sa1111_driver *drv = SA1111_DRV(_drv);
1297
1298 return dev->devid & drv->devid;
1299 }
1300
sa1111_bus_suspend(struct device * dev,pm_message_t state)1301 static int sa1111_bus_suspend(struct device *dev, pm_message_t state)
1302 {
1303 struct sa1111_dev *sadev = SA1111_DEV(dev);
1304 struct sa1111_driver *drv = SA1111_DRV(dev->driver);
1305 int ret = 0;
1306
1307 if (drv && drv->suspend)
1308 ret = drv->suspend(sadev, state);
1309 return ret;
1310 }
1311
sa1111_bus_resume(struct device * dev)1312 static int sa1111_bus_resume(struct device *dev)
1313 {
1314 struct sa1111_dev *sadev = SA1111_DEV(dev);
1315 struct sa1111_driver *drv = SA1111_DRV(dev->driver);
1316 int ret = 0;
1317
1318 if (drv && drv->resume)
1319 ret = drv->resume(sadev);
1320 return ret;
1321 }
1322
sa1111_bus_shutdown(struct device * dev)1323 static void sa1111_bus_shutdown(struct device *dev)
1324 {
1325 struct sa1111_driver *drv = SA1111_DRV(dev->driver);
1326
1327 if (drv && drv->shutdown)
1328 drv->shutdown(SA1111_DEV(dev));
1329 }
1330
sa1111_bus_probe(struct device * dev)1331 static int sa1111_bus_probe(struct device *dev)
1332 {
1333 struct sa1111_dev *sadev = SA1111_DEV(dev);
1334 struct sa1111_driver *drv = SA1111_DRV(dev->driver);
1335 int ret = -ENODEV;
1336
1337 if (drv->probe)
1338 ret = drv->probe(sadev);
1339 return ret;
1340 }
1341
sa1111_bus_remove(struct device * dev)1342 static int sa1111_bus_remove(struct device *dev)
1343 {
1344 struct sa1111_dev *sadev = SA1111_DEV(dev);
1345 struct sa1111_driver *drv = SA1111_DRV(dev->driver);
1346 int ret = 0;
1347
1348 if (drv->remove)
1349 ret = drv->remove(sadev);
1350 return ret;
1351 }
1352
1353 struct bus_type sa1111_bus_type = {
1354 .name = "sa1111-rab",
1355 .match = sa1111_match,
1356 .probe = sa1111_bus_probe,
1357 .remove = sa1111_bus_remove,
1358 .suspend = sa1111_bus_suspend,
1359 .resume = sa1111_bus_resume,
1360 .shutdown = sa1111_bus_shutdown,
1361 };
1362 EXPORT_SYMBOL(sa1111_bus_type);
1363
sa1111_driver_register(struct sa1111_driver * driver)1364 int sa1111_driver_register(struct sa1111_driver *driver)
1365 {
1366 driver->drv.bus = &sa1111_bus_type;
1367 return driver_register(&driver->drv);
1368 }
1369 EXPORT_SYMBOL(sa1111_driver_register);
1370
sa1111_driver_unregister(struct sa1111_driver * driver)1371 void sa1111_driver_unregister(struct sa1111_driver *driver)
1372 {
1373 driver_unregister(&driver->drv);
1374 }
1375 EXPORT_SYMBOL(sa1111_driver_unregister);
1376
1377 #ifdef CONFIG_DMABOUNCE
1378 /*
1379 * According to the "Intel StrongARM SA-1111 Microprocessor Companion
1380 * Chip Specification Update" (June 2000), erratum #7, there is a
1381 * significant bug in the SA1111 SDRAM shared memory controller. If
1382 * an access to a region of memory above 1MB relative to the bank base,
1383 * it is important that address bit 10 _NOT_ be asserted. Depending
1384 * on the configuration of the RAM, bit 10 may correspond to one
1385 * of several different (processor-relative) address bits.
1386 *
1387 * This routine only identifies whether or not a given DMA address
1388 * is susceptible to the bug.
1389 *
1390 * This should only get called for sa1111_device types due to the
1391 * way we configure our device dma_masks.
1392 */
sa1111_needs_bounce(struct device * dev,dma_addr_t addr,size_t size)1393 static int sa1111_needs_bounce(struct device *dev, dma_addr_t addr, size_t size)
1394 {
1395 /*
1396 * Section 4.6 of the "Intel StrongARM SA-1111 Development Module
1397 * User's Guide" mentions that jumpers R51 and R52 control the
1398 * target of SA-1111 DMA (either SDRAM bank 0 on Assabet, or
1399 * SDRAM bank 1 on Neponset). The default configuration selects
1400 * Assabet, so any address in bank 1 is necessarily invalid.
1401 */
1402 return (machine_is_assabet() || machine_is_pfs168()) &&
1403 (addr >= 0xc8000000 || (addr + size) >= 0xc8000000);
1404 }
1405
sa1111_notifier_call(struct notifier_block * n,unsigned long action,void * data)1406 static int sa1111_notifier_call(struct notifier_block *n, unsigned long action,
1407 void *data)
1408 {
1409 struct sa1111_dev *dev = SA1111_DEV(data);
1410
1411 switch (action) {
1412 case BUS_NOTIFY_ADD_DEVICE:
1413 if (dev->dev.dma_mask && dev->dma_mask < 0xffffffffUL) {
1414 int ret = dmabounce_register_dev(&dev->dev, 1024, 4096,
1415 sa1111_needs_bounce);
1416 if (ret)
1417 dev_err(&dev->dev, "failed to register with dmabounce: %d\n", ret);
1418 }
1419 break;
1420
1421 case BUS_NOTIFY_DEL_DEVICE:
1422 if (dev->dev.dma_mask && dev->dma_mask < 0xffffffffUL)
1423 dmabounce_unregister_dev(&dev->dev);
1424 break;
1425 }
1426 return NOTIFY_OK;
1427 }
1428
1429 static struct notifier_block sa1111_bus_notifier = {
1430 .notifier_call = sa1111_notifier_call,
1431 };
1432 #endif
1433
sa1111_init(void)1434 static int __init sa1111_init(void)
1435 {
1436 int ret = bus_register(&sa1111_bus_type);
1437 #ifdef CONFIG_DMABOUNCE
1438 if (ret == 0)
1439 bus_register_notifier(&sa1111_bus_type, &sa1111_bus_notifier);
1440 #endif
1441 if (ret == 0)
1442 platform_driver_register(&sa1111_device_driver);
1443 return ret;
1444 }
1445
sa1111_exit(void)1446 static void __exit sa1111_exit(void)
1447 {
1448 platform_driver_unregister(&sa1111_device_driver);
1449 #ifdef CONFIG_DMABOUNCE
1450 bus_unregister_notifier(&sa1111_bus_type, &sa1111_bus_notifier);
1451 #endif
1452 bus_unregister(&sa1111_bus_type);
1453 }
1454
1455 subsys_initcall(sa1111_init);
1456 module_exit(sa1111_exit);
1457
1458 MODULE_DESCRIPTION("Intel Corporation SA1111 core driver");
1459 MODULE_LICENSE("GPL");
1460