1 /******************************************************************************
2 
3   Copyright(c) 2003 - 2006 Intel Corporation. All rights reserved.
4 
5   This program is free software; you can redistribute it and/or modify it
6   under the terms of version 2 of the GNU General Public License as
7   published by the Free Software Foundation.
8 
9   This program is distributed in the hope that it will be useful, but WITHOUT
10   ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11   FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
12   more details.
13 
14   You should have received a copy of the GNU General Public License along with
15   this program; if not, write to the Free Software Foundation, Inc., 59
16   Temple Place - Suite 330, Boston, MA  02111-1307, USA.
17 
18   The full GNU General Public License is included in this distribution in the
19   file called LICENSE.
20 
21   Contact Information:
22   Intel Linux Wireless <ilw@linux.intel.com>
23   Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 
25 ******************************************************************************/
26 #ifndef _IPW2100_H
27 #define _IPW2100_H
28 
29 #include <linux/sched.h>
30 #include <linux/interrupt.h>
31 #include <linux/netdevice.h>
32 #include <linux/etherdevice.h>
33 #include <linux/list.h>
34 #include <linux/delay.h>
35 #include <linux/skbuff.h>
36 #include <asm/io.h>
37 #include <linux/socket.h>
38 #include <linux/if_arp.h>
39 #include <linux/wireless.h>
40 #include <net/iw_handler.h>	// new driver API
41 
42 #ifdef CONFIG_IPW2100_MONITOR
43 #include <net/ieee80211_radiotap.h>
44 #endif
45 
46 #include <linux/workqueue.h>
47 #include <linux/mutex.h>
48 
49 #include "libipw.h"
50 
51 struct ipw2100_priv;
52 struct ipw2100_tx_packet;
53 struct ipw2100_rx_packet;
54 
55 #define IPW_DL_UNINIT    0x80000000
56 #define IPW_DL_NONE      0x00000000
57 #define IPW_DL_ALL       0x7FFFFFFF
58 
59 /*
60  * To use the debug system;
61  *
62  * If you are defining a new debug classification, simply add it to the #define
63  * list here in the form of:
64  *
65  * #define IPW_DL_xxxx VALUE
66  *
67  * shifting value to the left one bit from the previous entry.  xxxx should be
68  * the name of the classification (for example, WEP)
69  *
70  * You then need to either add a IPW2100_xxxx_DEBUG() macro definition for your
71  * classification, or use IPW_DEBUG(IPW_DL_xxxx, ...) whenever you want
72  * to send output to that classification.
73  *
74  * To add your debug level to the list of levels seen when you perform
75  *
76  * % cat /proc/net/ipw2100/debug_level
77  *
78  * you simply need to add your entry to the ipw2100_debug_levels array.
79  *
80  * If you do not see debug_level in /proc/net/ipw2100 then you do not have
81  * CONFIG_IPW2100_DEBUG defined in your kernel configuration
82  *
83  */
84 
85 #define IPW_DL_ERROR         (1<<0)
86 #define IPW_DL_WARNING       (1<<1)
87 #define IPW_DL_INFO          (1<<2)
88 #define IPW_DL_WX            (1<<3)
89 #define IPW_DL_HC            (1<<5)
90 #define IPW_DL_STATE         (1<<6)
91 
92 #define IPW_DL_NOTIF         (1<<10)
93 #define IPW_DL_SCAN          (1<<11)
94 #define IPW_DL_ASSOC         (1<<12)
95 #define IPW_DL_DROP          (1<<13)
96 
97 #define IPW_DL_IOCTL         (1<<14)
98 #define IPW_DL_RF_KILL       (1<<17)
99 
100 #define IPW_DL_MANAGE        (1<<15)
101 #define IPW_DL_FW            (1<<16)
102 
103 #define IPW_DL_FRAG          (1<<21)
104 #define IPW_DL_WEP           (1<<22)
105 #define IPW_DL_TX            (1<<23)
106 #define IPW_DL_RX            (1<<24)
107 #define IPW_DL_ISR           (1<<25)
108 #define IPW_DL_IO            (1<<26)
109 #define IPW_DL_TRACE         (1<<28)
110 
111 #define IPW_DEBUG_ERROR(f, a...) printk(KERN_ERR DRV_NAME ": " f, ## a)
112 #define IPW_DEBUG_WARNING(f, a...) printk(KERN_WARNING DRV_NAME ": " f, ## a)
113 #define IPW_DEBUG_INFO(f...)    IPW_DEBUG(IPW_DL_INFO, ## f)
114 #define IPW_DEBUG_WX(f...)     IPW_DEBUG(IPW_DL_WX, ## f)
115 #define IPW_DEBUG_SCAN(f...)   IPW_DEBUG(IPW_DL_SCAN, ## f)
116 #define IPW_DEBUG_NOTIF(f...) IPW_DEBUG(IPW_DL_NOTIF, ## f)
117 #define IPW_DEBUG_TRACE(f...)  IPW_DEBUG(IPW_DL_TRACE, ## f)
118 #define IPW_DEBUG_RX(f...)     IPW_DEBUG(IPW_DL_RX, ## f)
119 #define IPW_DEBUG_TX(f...)     IPW_DEBUG(IPW_DL_TX, ## f)
120 #define IPW_DEBUG_ISR(f...)    IPW_DEBUG(IPW_DL_ISR, ## f)
121 #define IPW_DEBUG_MANAGEMENT(f...) IPW_DEBUG(IPW_DL_MANAGE, ## f)
122 #define IPW_DEBUG_WEP(f...)    IPW_DEBUG(IPW_DL_WEP, ## f)
123 #define IPW_DEBUG_HC(f...) IPW_DEBUG(IPW_DL_HC, ## f)
124 #define IPW_DEBUG_FRAG(f...) IPW_DEBUG(IPW_DL_FRAG, ## f)
125 #define IPW_DEBUG_FW(f...) IPW_DEBUG(IPW_DL_FW, ## f)
126 #define IPW_DEBUG_RF_KILL(f...) IPW_DEBUG(IPW_DL_RF_KILL, ## f)
127 #define IPW_DEBUG_DROP(f...) IPW_DEBUG(IPW_DL_DROP, ## f)
128 #define IPW_DEBUG_IO(f...) IPW_DEBUG(IPW_DL_IO, ## f)
129 #define IPW_DEBUG_IOCTL(f...) IPW_DEBUG(IPW_DL_IOCTL, ## f)
130 #define IPW_DEBUG_STATE(f, a...) IPW_DEBUG(IPW_DL_STATE | IPW_DL_ASSOC | IPW_DL_INFO, f, ## a)
131 #define IPW_DEBUG_ASSOC(f, a...) IPW_DEBUG(IPW_DL_ASSOC | IPW_DL_INFO, f, ## a)
132 
133 enum {
134 	IPW_HW_STATE_DISABLED = 1,
135 	IPW_HW_STATE_ENABLED = 0
136 };
137 
138 struct ssid_context {
139 	char ssid[IW_ESSID_MAX_SIZE + 1];
140 	int ssid_len;
141 	unsigned char bssid[ETH_ALEN];
142 	int port_type;
143 	int channel;
144 
145 };
146 
147 extern const char *port_type_str[];
148 extern const char *band_str[];
149 
150 #define NUMBER_OF_BD_PER_COMMAND_PACKET		1
151 #define NUMBER_OF_BD_PER_DATA_PACKET		2
152 
153 #define IPW_MAX_BDS 6
154 #define NUMBER_OF_OVERHEAD_BDS_PER_PACKETR	2
155 #define NUMBER_OF_BDS_TO_LEAVE_FOR_COMMANDS	1
156 
157 #define REQUIRED_SPACE_IN_RING_FOR_COMMAND_PACKET \
158     (IPW_BD_QUEUE_W_R_MIN_SPARE + NUMBER_OF_BD_PER_COMMAND_PACKET)
159 
160 struct bd_status {
161 	union {
162 		struct {
163 			u8 nlf:1, txType:2, intEnabled:1, reserved:4;
164 		} fields;
165 		u8 field;
166 	} info;
167 } __packed;
168 
169 struct ipw2100_bd {
170 	u32 host_addr;
171 	u32 buf_length;
172 	struct bd_status status;
173 	/* number of fragments for frame (should be set only for
174 	 * 1st TBD) */
175 	u8 num_fragments;
176 	u8 reserved[6];
177 } __packed;
178 
179 #define IPW_BD_QUEUE_LENGTH(n) (1<<n)
180 #define IPW_BD_ALIGNMENT(L)    (L*sizeof(struct ipw2100_bd))
181 
182 #define IPW_BD_STATUS_TX_FRAME_802_3             0x00
183 #define IPW_BD_STATUS_TX_FRAME_NOT_LAST_FRAGMENT 0x01
184 #define IPW_BD_STATUS_TX_FRAME_COMMAND		 0x02
185 #define IPW_BD_STATUS_TX_FRAME_802_11	         0x04
186 #define IPW_BD_STATUS_TX_INTERRUPT_ENABLE	 0x08
187 
188 struct ipw2100_bd_queue {
189 	/* driver (virtual) pointer to queue */
190 	struct ipw2100_bd *drv;
191 
192 	/* firmware (physical) pointer to queue */
193 	dma_addr_t nic;
194 
195 	/* Length of phy memory allocated for BDs */
196 	u32 size;
197 
198 	/* Number of BDs in queue (and in array) */
199 	u32 entries;
200 
201 	/* Number of available BDs (invalid for NIC BDs) */
202 	u32 available;
203 
204 	/* Offset of oldest used BD in array (next one to
205 	 * check for completion) */
206 	u32 oldest;
207 
208 	/* Offset of next available (unused) BD */
209 	u32 next;
210 };
211 
212 #define RX_QUEUE_LENGTH 256
213 #define TX_QUEUE_LENGTH 256
214 #define HW_QUEUE_LENGTH 256
215 
216 #define TX_PENDED_QUEUE_LENGTH (TX_QUEUE_LENGTH / NUMBER_OF_BD_PER_DATA_PACKET)
217 
218 #define STATUS_TYPE_MASK	0x0000000f
219 #define COMMAND_STATUS_VAL	0
220 #define STATUS_CHANGE_VAL	1
221 #define P80211_DATA_VAL 	2
222 #define P8023_DATA_VAL		3
223 #define HOST_NOTIFICATION_VAL	4
224 
225 #define IPW2100_RSSI_TO_DBM (-98)
226 
227 struct ipw2100_status {
228 	u32 frame_size;
229 	u16 status_fields;
230 	u8 flags;
231 #define IPW_STATUS_FLAG_DECRYPTED	(1<<0)
232 #define IPW_STATUS_FLAG_WEP_ENCRYPTED	(1<<1)
233 #define IPW_STATUS_FLAG_CRC_ERROR       (1<<2)
234 	u8 rssi;
235 } __packed;
236 
237 struct ipw2100_status_queue {
238 	/* driver (virtual) pointer to queue */
239 	struct ipw2100_status *drv;
240 
241 	/* firmware (physical) pointer to queue */
242 	dma_addr_t nic;
243 
244 	/* Length of phy memory allocated for BDs */
245 	u32 size;
246 };
247 
248 #define HOST_COMMAND_PARAMS_REG_LEN	100
249 #define CMD_STATUS_PARAMS_REG_LEN 	3
250 
251 #define IPW_WPA_CAPABILITIES   0x1
252 #define IPW_WPA_LISTENINTERVAL 0x2
253 #define IPW_WPA_AP_ADDRESS     0x4
254 
255 #define IPW_MAX_VAR_IE_LEN ((HOST_COMMAND_PARAMS_REG_LEN - 4) * sizeof(u32))
256 
257 struct ipw2100_wpa_assoc_frame {
258 	u16 fixed_ie_mask;
259 	struct {
260 		u16 capab_info;
261 		u16 listen_interval;
262 		u8 current_ap[ETH_ALEN];
263 	} fixed_ies;
264 	u32 var_ie_len;
265 	u8 var_ie[IPW_MAX_VAR_IE_LEN];
266 };
267 
268 #define IPW_BSS     1
269 #define IPW_MONITOR 2
270 #define IPW_IBSS    3
271 
272 /**
273  * @struct _tx_cmd - HWCommand
274  * @brief H/W command structure.
275  */
276 struct ipw2100_cmd_header {
277 	u32 host_command_reg;
278 	u32 host_command_reg1;
279 	u32 sequence;
280 	u32 host_command_len_reg;
281 	u32 host_command_params_reg[HOST_COMMAND_PARAMS_REG_LEN];
282 	u32 cmd_status_reg;
283 	u32 cmd_status_params_reg[CMD_STATUS_PARAMS_REG_LEN];
284 	u32 rxq_base_ptr;
285 	u32 rxq_next_ptr;
286 	u32 rxq_host_ptr;
287 	u32 txq_base_ptr;
288 	u32 txq_next_ptr;
289 	u32 txq_host_ptr;
290 	u32 tx_status_reg;
291 	u32 reserved;
292 	u32 status_change_reg;
293 	u32 reserved1[3];
294 	u32 *ordinal1_ptr;
295 	u32 *ordinal2_ptr;
296 } __packed;
297 
298 struct ipw2100_data_header {
299 	u32 host_command_reg;
300 	u32 host_command_reg1;
301 	u8 encrypted;		// BOOLEAN in win! TRUE if frame is enc by driver
302 	u8 needs_encryption;	// BOOLEAN in win! TRUE if frma need to be enc in NIC
303 	u8 wep_index;		// 0 no key, 1-4 key index, 0xff immediate key
304 	u8 key_size;		// 0 no imm key, 0x5 64bit encr, 0xd 128bit encr, 0x10 128bit encr and 128bit IV
305 	u8 key[16];
306 	u8 reserved[10];	// f/w reserved
307 	u8 src_addr[ETH_ALEN];
308 	u8 dst_addr[ETH_ALEN];
309 	u16 fragment_size;
310 } __packed;
311 
312 /* Host command data structure */
313 struct host_command {
314 	u32 host_command;	// COMMAND ID
315 	u32 host_command1;	// COMMAND ID
316 	u32 host_command_sequence;	// UNIQUE COMMAND NUMBER (ID)
317 	u32 host_command_length;	// LENGTH
318 	u32 host_command_parameters[HOST_COMMAND_PARAMS_REG_LEN];	// COMMAND PARAMETERS
319 } __packed;
320 
321 typedef enum {
322 	POWER_ON_RESET,
323 	EXIT_POWER_DOWN_RESET,
324 	SW_RESET,
325 	EEPROM_RW,
326 	SW_RE_INIT
327 } ipw2100_reset_event;
328 
329 enum {
330 	COMMAND = 0xCAFE,
331 	DATA,
332 	RX
333 };
334 
335 struct ipw2100_tx_packet {
336 	int type;
337 	int index;
338 	union {
339 		struct {	/* COMMAND */
340 			struct ipw2100_cmd_header *cmd;
341 			dma_addr_t cmd_phys;
342 		} c_struct;
343 		struct {	/* DATA */
344 			struct ipw2100_data_header *data;
345 			dma_addr_t data_phys;
346 			struct libipw_txb *txb;
347 		} d_struct;
348 	} info;
349 	int jiffy_start;
350 
351 	struct list_head list;
352 };
353 
354 struct ipw2100_rx_packet {
355 	struct ipw2100_rx *rxp;
356 	dma_addr_t dma_addr;
357 	int jiffy_start;
358 	struct sk_buff *skb;
359 	struct list_head list;
360 };
361 
362 #define FRAG_DISABLED             (1<<31)
363 #define RTS_DISABLED              (1<<31)
364 #define MAX_RTS_THRESHOLD         2304U
365 #define MIN_RTS_THRESHOLD         1U
366 #define DEFAULT_RTS_THRESHOLD     1000U
367 
368 #define DEFAULT_BEACON_INTERVAL   100U
369 #define	DEFAULT_SHORT_RETRY_LIMIT 7U
370 #define	DEFAULT_LONG_RETRY_LIMIT  4U
371 
372 struct ipw2100_ordinals {
373 	u32 table1_addr;
374 	u32 table2_addr;
375 	u32 table1_size;
376 	u32 table2_size;
377 };
378 
379 /* Host Notification header */
380 struct ipw2100_notification {
381 	u32 hnhdr_subtype;	/* type of host notification */
382 	u32 hnhdr_size;		/* size in bytes of data
383 				   or number of entries, if table.
384 				   Does NOT include header */
385 } __packed;
386 
387 #define MAX_KEY_SIZE	16
388 #define	MAX_KEYS	8
389 
390 #define IPW2100_WEP_ENABLE     (1<<1)
391 #define IPW2100_WEP_DROP_CLEAR (1<<2)
392 
393 #define IPW_NONE_CIPHER   (1<<0)
394 #define IPW_WEP40_CIPHER  (1<<1)
395 #define IPW_TKIP_CIPHER   (1<<2)
396 #define IPW_CCMP_CIPHER   (1<<4)
397 #define IPW_WEP104_CIPHER (1<<5)
398 #define IPW_CKIP_CIPHER   (1<<6)
399 
400 #define	IPW_AUTH_OPEN     	0
401 #define	IPW_AUTH_SHARED   	1
402 #define IPW_AUTH_LEAP	  	2
403 #define IPW_AUTH_LEAP_CISCO_ID	0x80
404 
405 struct statistic {
406 	int value;
407 	int hi;
408 	int lo;
409 };
410 
411 #define INIT_STAT(x) do {  \
412   (x)->value = (x)->hi = 0; \
413   (x)->lo = 0x7fffffff; \
414 } while (0)
415 #define SET_STAT(x,y) do { \
416   (x)->value = y; \
417   if ((x)->value > (x)->hi) (x)->hi = (x)->value; \
418   if ((x)->value < (x)->lo) (x)->lo = (x)->value; \
419 } while (0)
420 #define INC_STAT(x) do { if (++(x)->value > (x)->hi) (x)->hi = (x)->value; } \
421 while (0)
422 #define DEC_STAT(x) do { if (--(x)->value < (x)->lo) (x)->lo = (x)->value; } \
423 while (0)
424 
425 #define IPW2100_ERROR_QUEUE 5
426 
427 /* Power management code: enable or disable? */
428 enum {
429 #ifdef CONFIG_PM
430 	IPW2100_PM_DISABLED = 0,
431 	PM_STATE_SIZE = 16,
432 #else
433 	IPW2100_PM_DISABLED = 1,
434 	PM_STATE_SIZE = 0,
435 #endif
436 };
437 
438 #define STATUS_POWERED          (1<<0)
439 #define STATUS_CMD_ACTIVE       (1<<1)	/**< host command in progress */
440 #define STATUS_RUNNING          (1<<2)	/* Card initialized, but not enabled */
441 #define STATUS_ENABLED          (1<<3)	/* Card enabled -- can scan,Tx,Rx */
442 #define STATUS_STOPPING         (1<<4)	/* Card is in shutdown phase */
443 #define STATUS_INITIALIZED      (1<<5)	/* Card is ready for external calls */
444 #define STATUS_ASSOCIATING      (1<<9)	/* Associated, but no BSSID yet */
445 #define STATUS_ASSOCIATED       (1<<10)	/* Associated and BSSID valid */
446 #define STATUS_INT_ENABLED      (1<<11)
447 #define STATUS_RF_KILL_HW       (1<<12)
448 #define STATUS_RF_KILL_SW       (1<<13)
449 #define STATUS_RF_KILL_MASK     (STATUS_RF_KILL_HW | STATUS_RF_KILL_SW)
450 #define STATUS_EXIT_PENDING     (1<<14)
451 
452 #define STATUS_SCAN_PENDING     (1<<23)
453 #define STATUS_SCANNING         (1<<24)
454 #define STATUS_SCAN_ABORTING    (1<<25)
455 #define STATUS_SCAN_COMPLETE    (1<<26)
456 #define STATUS_WX_EVENT_PENDING (1<<27)
457 #define STATUS_RESET_PENDING    (1<<29)
458 #define STATUS_SECURITY_UPDATED (1<<30)	/* Security sync needed */
459 
460 /* Internal NIC states */
461 #define IPW_STATE_INITIALIZED	(1<<0)
462 #define IPW_STATE_COUNTRY_FOUND	(1<<1)
463 #define IPW_STATE_ASSOCIATED    (1<<2)
464 #define IPW_STATE_ASSN_LOST	(1<<3)
465 #define IPW_STATE_ASSN_CHANGED 	(1<<4)
466 #define IPW_STATE_SCAN_COMPLETE	(1<<5)
467 #define IPW_STATE_ENTERED_PSP 	(1<<6)
468 #define IPW_STATE_LEFT_PSP 	(1<<7)
469 #define IPW_STATE_RF_KILL       (1<<8)
470 #define IPW_STATE_DISABLED	(1<<9)
471 #define IPW_STATE_POWER_DOWN	(1<<10)
472 #define IPW_STATE_SCANNING      (1<<11)
473 
474 #define CFG_STATIC_CHANNEL      (1<<0)	/* Restrict assoc. to single channel */
475 #define CFG_STATIC_ESSID        (1<<1)	/* Restrict assoc. to single SSID */
476 #define CFG_STATIC_BSSID        (1<<2)	/* Restrict assoc. to single BSSID */
477 #define CFG_CUSTOM_MAC          (1<<3)
478 #define CFG_LONG_PREAMBLE       (1<<4)
479 #define CFG_ASSOCIATE           (1<<6)
480 #define CFG_FIXED_RATE          (1<<7)
481 #define CFG_ADHOC_CREATE        (1<<8)
482 #define CFG_PASSIVE_SCAN        (1<<10)
483 #ifdef CONFIG_IPW2100_MONITOR
484 #define CFG_CRC_CHECK           (1<<11)
485 #endif
486 
487 #define CAP_SHARED_KEY          (1<<0)	/* Off = OPEN */
488 #define CAP_PRIVACY_ON          (1<<1)	/* Off = No privacy */
489 
490 struct ipw2100_priv {
491 
492 	int stop_hang_check;	/* Set 1 when shutting down to kill hang_check */
493 	int stop_rf_kill;	/* Set 1 when shutting down to kill rf_kill */
494 
495 	struct libipw_device *ieee;
496 	unsigned long status;
497 	unsigned long config;
498 	unsigned long capability;
499 
500 	/* Statistics */
501 	int resets;
502 	int reset_backoff;
503 
504 	/* Context */
505 	u8 essid[IW_ESSID_MAX_SIZE];
506 	u8 essid_len;
507 	u8 bssid[ETH_ALEN];
508 	u8 channel;
509 	int last_mode;
510 
511 	unsigned long connect_start;
512 	unsigned long last_reset;
513 
514 	u32 channel_mask;
515 	u32 fatal_error;
516 	u32 fatal_errors[IPW2100_ERROR_QUEUE];
517 	u32 fatal_index;
518 	int eeprom_version;
519 	int firmware_version;
520 	unsigned long hw_features;
521 	int hangs;
522 	u32 last_rtc;
523 	int dump_raw;		/* 1 to dump raw bytes in /sys/.../memory */
524 	u8 *snapshot[0x30];
525 
526 	u8 mandatory_bssid_mac[ETH_ALEN];
527 	u8 mac_addr[ETH_ALEN];
528 
529 	int power_mode;
530 
531 	int messages_sent;
532 
533 	int short_retry_limit;
534 	int long_retry_limit;
535 
536 	u32 rts_threshold;
537 	u32 frag_threshold;
538 
539 	int in_isr;
540 
541 	u32 tx_rates;
542 	int tx_power;
543 	u32 beacon_interval;
544 
545 	char nick[IW_ESSID_MAX_SIZE + 1];
546 
547 	struct ipw2100_status_queue status_queue;
548 
549 	struct statistic txq_stat;
550 	struct statistic rxq_stat;
551 	struct ipw2100_bd_queue rx_queue;
552 	struct ipw2100_bd_queue tx_queue;
553 	struct ipw2100_rx_packet *rx_buffers;
554 
555 	struct statistic fw_pend_stat;
556 	struct list_head fw_pend_list;
557 
558 	struct statistic msg_free_stat;
559 	struct statistic msg_pend_stat;
560 	struct list_head msg_free_list;
561 	struct list_head msg_pend_list;
562 	struct ipw2100_tx_packet *msg_buffers;
563 
564 	struct statistic tx_free_stat;
565 	struct statistic tx_pend_stat;
566 	struct list_head tx_free_list;
567 	struct list_head tx_pend_list;
568 	struct ipw2100_tx_packet *tx_buffers;
569 
570 	struct ipw2100_ordinals ordinals;
571 
572 	struct pci_dev *pci_dev;
573 
574 	struct proc_dir_entry *dir_dev;
575 
576 	struct net_device *net_dev;
577 	struct iw_statistics wstats;
578 
579 	struct iw_public_data wireless_data;
580 
581 	struct tasklet_struct irq_tasklet;
582 
583 	struct delayed_work reset_work;
584 	struct delayed_work security_work;
585 	struct delayed_work wx_event_work;
586 	struct delayed_work hang_check;
587 	struct delayed_work rf_kill;
588 	struct work_struct scan_event_now;
589 	struct delayed_work scan_event_later;
590 
591 	int user_requested_scan;
592 
593 	/* Track time in suspend */
594 	unsigned long suspend_at;
595 	unsigned long suspend_time;
596 
597 	u32 interrupts;
598 	int tx_interrupts;
599 	int rx_interrupts;
600 	int inta_other;
601 
602 	spinlock_t low_lock;
603 	struct mutex action_mutex;
604 	struct mutex adapter_mutex;
605 
606 	wait_queue_head_t wait_command_queue;
607 };
608 
609 /*********************************************************
610  * Host Command -> From Driver to FW
611  *********************************************************/
612 
613 /**
614  * Host command identifiers
615  */
616 #define HOST_COMPLETE           2
617 #define SYSTEM_CONFIG           6
618 #define SSID                    8
619 #define MANDATORY_BSSID         9
620 #define AUTHENTICATION_TYPE    10
621 #define ADAPTER_ADDRESS        11
622 #define PORT_TYPE              12
623 #define INTERNATIONAL_MODE     13
624 #define CHANNEL                14
625 #define RTS_THRESHOLD          15
626 #define FRAG_THRESHOLD         16
627 #define POWER_MODE             17
628 #define TX_RATES               18
629 #define BASIC_TX_RATES         19
630 #define WEP_KEY_INFO           20
631 #define WEP_KEY_INDEX          25
632 #define WEP_FLAGS              26
633 #define ADD_MULTICAST          27
634 #define CLEAR_ALL_MULTICAST    28
635 #define BEACON_INTERVAL        29
636 #define ATIM_WINDOW            30
637 #define CLEAR_STATISTICS       31
638 #define SEND		       33
639 #define TX_POWER_INDEX         36
640 #define BROADCAST_SCAN         43
641 #define CARD_DISABLE           44
642 #define PREFERRED_BSSID        45
643 #define SET_SCAN_OPTIONS       46
644 #define SCAN_DWELL_TIME        47
645 #define SWEEP_TABLE            48
646 #define AP_OR_STATION_TABLE    49
647 #define GROUP_ORDINALS         50
648 #define SHORT_RETRY_LIMIT      51
649 #define LONG_RETRY_LIMIT       52
650 
651 #define HOST_PRE_POWER_DOWN    58
652 #define CARD_DISABLE_PHY_OFF   61
653 #define MSDU_TX_RATES          62
654 
655 /* Rogue AP Detection */
656 #define SET_STATION_STAT_BITS      64
657 #define CLEAR_STATIONS_STAT_BITS   65
658 #define LEAP_ROGUE_MODE            66	//TODO tbw replaced by CFG_LEAP_ROGUE_AP
659 #define SET_SECURITY_INFORMATION   67
660 #define DISASSOCIATION_BSSID	   68
661 #define SET_WPA_IE                 69
662 
663 /* system configuration bit mask: */
664 #define IPW_CFG_MONITOR               0x00004
665 #define IPW_CFG_PREAMBLE_AUTO        0x00010
666 #define IPW_CFG_IBSS_AUTO_START     0x00020
667 #define IPW_CFG_LOOPBACK            0x00100
668 #define IPW_CFG_ANSWER_BCSSID_PROBE 0x00800
669 #define IPW_CFG_BT_SIDEBAND_SIGNAL	0x02000
670 #define IPW_CFG_802_1x_ENABLE       0x04000
671 #define IPW_CFG_BSS_MASK		0x08000
672 #define IPW_CFG_IBSS_MASK		0x10000
673 
674 #define IPW_SCAN_NOASSOCIATE (1<<0)
675 #define IPW_SCAN_MIXED_CELL (1<<1)
676 /* RESERVED (1<<2) */
677 #define IPW_SCAN_PASSIVE (1<<3)
678 
679 #define IPW_NIC_FATAL_ERROR 0x2A7F0
680 #define IPW_ERROR_ADDR(x) (x & 0x3FFFF)
681 #define IPW_ERROR_CODE(x) ((x & 0xFF000000) >> 24)
682 #define IPW2100_ERR_C3_CORRUPTION (0x10 << 24)
683 #define IPW2100_ERR_MSG_TIMEOUT   (0x11 << 24)
684 #define IPW2100_ERR_FW_LOAD       (0x12 << 24)
685 
686 #define IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND			0x200
687 #define IPW_MEM_SRAM_HOST_INTERRUPT_AREA_LOWER_BOUND  	IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x0D80
688 
689 #define IPW_MEM_HOST_SHARED_RX_BD_BASE                  (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x40)
690 #define IPW_MEM_HOST_SHARED_RX_STATUS_BASE              (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x44)
691 #define IPW_MEM_HOST_SHARED_RX_BD_SIZE                  (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x48)
692 #define IPW_MEM_HOST_SHARED_RX_READ_INDEX               (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0xa0)
693 
694 #define IPW_MEM_HOST_SHARED_TX_QUEUE_BD_BASE          (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x00)
695 #define IPW_MEM_HOST_SHARED_TX_QUEUE_BD_SIZE          (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x04)
696 #define IPW_MEM_HOST_SHARED_TX_QUEUE_READ_INDEX       (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x80)
697 
698 #define IPW_MEM_HOST_SHARED_RX_WRITE_INDEX \
699     (IPW_MEM_SRAM_HOST_INTERRUPT_AREA_LOWER_BOUND + 0x20)
700 
701 #define IPW_MEM_HOST_SHARED_TX_QUEUE_WRITE_INDEX \
702     (IPW_MEM_SRAM_HOST_INTERRUPT_AREA_LOWER_BOUND)
703 
704 #define IPW_MEM_HOST_SHARED_ORDINALS_TABLE_1   (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x180)
705 #define IPW_MEM_HOST_SHARED_ORDINALS_TABLE_2   (IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND + 0x184)
706 
707 #define IPW2100_INTA_TX_TRANSFER               (0x00000001)	// Bit 0 (LSB)
708 #define IPW2100_INTA_RX_TRANSFER               (0x00000002)	// Bit 1
709 #define IPW2100_INTA_TX_COMPLETE	       (0x00000004)	// Bit 2
710 #define IPW2100_INTA_EVENT_INTERRUPT           (0x00000008)	// Bit 3
711 #define IPW2100_INTA_STATUS_CHANGE             (0x00000010)	// Bit 4
712 #define IPW2100_INTA_BEACON_PERIOD_EXPIRED     (0x00000020)	// Bit 5
713 #define IPW2100_INTA_SLAVE_MODE_HOST_COMMAND_DONE  (0x00010000)	// Bit 16
714 #define IPW2100_INTA_FW_INIT_DONE              (0x01000000)	// Bit 24
715 #define IPW2100_INTA_FW_CALIBRATION_CALC       (0x02000000)	// Bit 25
716 #define IPW2100_INTA_FATAL_ERROR               (0x40000000)	// Bit 30
717 #define IPW2100_INTA_PARITY_ERROR              (0x80000000)	// Bit 31 (MSB)
718 
719 #define IPW_AUX_HOST_RESET_REG_PRINCETON_RESET              (0x00000001)
720 #define IPW_AUX_HOST_RESET_REG_FORCE_NMI                    (0x00000002)
721 #define IPW_AUX_HOST_RESET_REG_PCI_HOST_CLUSTER_FATAL_NMI   (0x00000004)
722 #define IPW_AUX_HOST_RESET_REG_CORE_FATAL_NMI               (0x00000008)
723 #define IPW_AUX_HOST_RESET_REG_SW_RESET                     (0x00000080)
724 #define IPW_AUX_HOST_RESET_REG_MASTER_DISABLED              (0x00000100)
725 #define IPW_AUX_HOST_RESET_REG_STOP_MASTER                  (0x00000200)
726 
727 #define IPW_AUX_HOST_GP_CNTRL_BIT_CLOCK_READY           (0x00000001)	// Bit 0 (LSB)
728 #define IPW_AUX_HOST_GP_CNTRL_BIT_HOST_ALLOWS_STANDBY   (0x00000002)	// Bit 1
729 #define IPW_AUX_HOST_GP_CNTRL_BIT_INIT_DONE             (0x00000004)	// Bit 2
730 #define IPW_AUX_HOST_GP_CNTRL_BITS_SYS_CONFIG           (0x000007c0)	// Bits 6-10
731 #define IPW_AUX_HOST_GP_CNTRL_BIT_BUS_TYPE              (0x00000200)	// Bit 9
732 #define IPW_AUX_HOST_GP_CNTRL_BIT_BAR0_BLOCK_SIZE       (0x00000400)	// Bit 10
733 #define IPW_AUX_HOST_GP_CNTRL_BIT_USB_MODE              (0x20000000)	// Bit 29
734 #define IPW_AUX_HOST_GP_CNTRL_BIT_HOST_FORCES_SYS_CLK   (0x40000000)	// Bit 30
735 #define IPW_AUX_HOST_GP_CNTRL_BIT_FW_FORCES_SYS_CLK     (0x80000000)	// Bit 31 (MSB)
736 
737 #define IPW_BIT_GPIO_GPIO1_MASK         0x0000000C
738 #define IPW_BIT_GPIO_GPIO3_MASK         0x000000C0
739 #define IPW_BIT_GPIO_GPIO1_ENABLE       0x00000008
740 #define IPW_BIT_GPIO_RF_KILL            0x00010000
741 
742 #define IPW_BIT_GPIO_LED_OFF            0x00002000	// Bit 13 = 1
743 
744 #define IPW_REG_DOMAIN_0_OFFSET 	0x0000
745 #define IPW_REG_DOMAIN_1_OFFSET 	IPW_MEM_SRAM_HOST_SHARED_LOWER_BOUND
746 
747 #define IPW_REG_INTA			IPW_REG_DOMAIN_0_OFFSET + 0x0008
748 #define IPW_REG_INTA_MASK		IPW_REG_DOMAIN_0_OFFSET + 0x000C
749 #define IPW_REG_INDIRECT_ACCESS_ADDRESS	IPW_REG_DOMAIN_0_OFFSET + 0x0010
750 #define IPW_REG_INDIRECT_ACCESS_DATA	IPW_REG_DOMAIN_0_OFFSET + 0x0014
751 #define IPW_REG_AUTOINCREMENT_ADDRESS	IPW_REG_DOMAIN_0_OFFSET + 0x0018
752 #define IPW_REG_AUTOINCREMENT_DATA	IPW_REG_DOMAIN_0_OFFSET + 0x001C
753 #define IPW_REG_RESET_REG		IPW_REG_DOMAIN_0_OFFSET + 0x0020
754 #define IPW_REG_GP_CNTRL		IPW_REG_DOMAIN_0_OFFSET + 0x0024
755 #define IPW_REG_GPIO			IPW_REG_DOMAIN_0_OFFSET + 0x0030
756 #define IPW_REG_FW_TYPE                 IPW_REG_DOMAIN_1_OFFSET + 0x0188
757 #define IPW_REG_FW_VERSION 		IPW_REG_DOMAIN_1_OFFSET + 0x018C
758 #define IPW_REG_FW_COMPATABILITY_VERSION IPW_REG_DOMAIN_1_OFFSET + 0x0190
759 
760 #define IPW_REG_INDIRECT_ADDR_MASK	0x00FFFFFC
761 
762 #define IPW_INTERRUPT_MASK		0xC1010013
763 
764 #define IPW2100_CONTROL_REG             0x220000
765 #define IPW2100_CONTROL_PHY_OFF         0x8
766 
767 #define IPW2100_COMMAND			0x00300004
768 #define IPW2100_COMMAND_PHY_ON		0x0
769 #define IPW2100_COMMAND_PHY_OFF		0x1
770 
771 /* in DEBUG_AREA, values of memory always 0xd55555d5 */
772 #define IPW_REG_DOA_DEBUG_AREA_START    IPW_REG_DOMAIN_0_OFFSET + 0x0090
773 #define IPW_REG_DOA_DEBUG_AREA_END      IPW_REG_DOMAIN_0_OFFSET + 0x00FF
774 #define IPW_DATA_DOA_DEBUG_VALUE        0xd55555d5
775 
776 #define IPW_INTERNAL_REGISTER_HALT_AND_RESET	0x003000e0
777 
778 #define IPW_WAIT_CLOCK_STABILIZATION_DELAY	    50	// micro seconds
779 #define IPW_WAIT_RESET_ARC_COMPLETE_DELAY	    10	// micro seconds
780 #define IPW_WAIT_RESET_MASTER_ASSERT_COMPLETE_DELAY 10	// micro seconds
781 
782 // BD ring queue read/write difference
783 #define IPW_BD_QUEUE_W_R_MIN_SPARE 2
784 
785 #define IPW_CACHE_LINE_LENGTH_DEFAULT		    0x80
786 
787 #define IPW_CARD_DISABLE_PHY_OFF_COMPLETE_WAIT	    100	// 100 milli
788 #define IPW_PREPARE_POWER_DOWN_COMPLETE_WAIT	    100	// 100 milli
789 
790 #define IPW_HEADER_802_11_SIZE		 sizeof(struct libipw_hdr_3addr)
791 #define IPW_MAX_80211_PAYLOAD_SIZE              2304U
792 #define IPW_MAX_802_11_PAYLOAD_LENGTH		2312
793 #define IPW_MAX_ACCEPTABLE_TX_FRAME_LENGTH	1536
794 #define IPW_MIN_ACCEPTABLE_RX_FRAME_LENGTH	60
795 #define IPW_MAX_ACCEPTABLE_RX_FRAME_LENGTH \
796 	(IPW_MAX_ACCEPTABLE_TX_FRAME_LENGTH + IPW_HEADER_802_11_SIZE - \
797         sizeof(struct ethhdr))
798 
799 #define IPW_802_11_FCS_LENGTH 4
800 #define IPW_RX_NIC_BUFFER_LENGTH \
801         (IPW_MAX_802_11_PAYLOAD_LENGTH + IPW_HEADER_802_11_SIZE + \
802 		IPW_802_11_FCS_LENGTH)
803 
804 #define IPW_802_11_PAYLOAD_OFFSET \
805         (sizeof(struct libipw_hdr_3addr) + \
806          sizeof(struct libipw_snap_hdr))
807 
808 struct ipw2100_rx {
809 	union {
810 		unsigned char payload[IPW_RX_NIC_BUFFER_LENGTH];
811 		struct libipw_hdr_4addr header;
812 		u32 status;
813 		struct ipw2100_notification notification;
814 		struct ipw2100_cmd_header command;
815 	} rx_data;
816 } __packed;
817 
818 /* Bit 0-7 are for 802.11b tx rates - .  Bit 5-7 are reserved */
819 #define TX_RATE_1_MBIT              0x0001
820 #define TX_RATE_2_MBIT              0x0002
821 #define TX_RATE_5_5_MBIT            0x0004
822 #define TX_RATE_11_MBIT             0x0008
823 #define TX_RATE_MASK                0x000F
824 #define DEFAULT_TX_RATES            0x000F
825 
826 #define IPW_POWER_MODE_CAM           0x00	//(always on)
827 #define IPW_POWER_INDEX_1            0x01
828 #define IPW_POWER_INDEX_2            0x02
829 #define IPW_POWER_INDEX_3            0x03
830 #define IPW_POWER_INDEX_4            0x04
831 #define IPW_POWER_INDEX_5            0x05
832 #define IPW_POWER_AUTO               0x06
833 #define IPW_POWER_MASK               0x0F
834 #define IPW_POWER_ENABLED            0x10
835 #define IPW_POWER_LEVEL(x)           ((x) & IPW_POWER_MASK)
836 
837 #define IPW_TX_POWER_AUTO            0
838 #define IPW_TX_POWER_ENHANCED        1
839 
840 #define IPW_TX_POWER_DEFAULT         32
841 #define IPW_TX_POWER_MIN             0
842 #define IPW_TX_POWER_MAX             16
843 #define IPW_TX_POWER_MIN_DBM         (-12)
844 #define IPW_TX_POWER_MAX_DBM         16
845 
846 #define FW_SCAN_DONOT_ASSOCIATE     0x0001	// Dont Attempt to Associate after Scan
847 #define FW_SCAN_PASSIVE             0x0008	// Force PASSSIVE Scan
848 
849 #define REG_MIN_CHANNEL             0
850 #define REG_MAX_CHANNEL             14
851 
852 #define REG_CHANNEL_MASK            0x00003FFF
853 #define IPW_IBSS_11B_DEFAULT_MASK   0x87ff
854 
855 #define DIVERSITY_EITHER            0	// Use both antennas
856 #define DIVERSITY_ANTENNA_A         1	// Use antenna A
857 #define DIVERSITY_ANTENNA_B         2	// Use antenna B
858 
859 #define HOST_COMMAND_WAIT 0
860 #define HOST_COMMAND_NO_WAIT 1
861 
862 #define LOCK_NONE 0
863 #define LOCK_DRIVER 1
864 #define LOCK_FW 2
865 
866 #define TYPE_SWEEP_ORD                  0x000D
867 #define TYPE_IBSS_STTN_ORD              0x000E
868 #define TYPE_BSS_AP_ORD                 0x000F
869 #define TYPE_RAW_BEACON_ENTRY           0x0010
870 #define TYPE_CALIBRATION_DATA           0x0011
871 #define TYPE_ROGUE_AP_DATA              0x0012
872 #define TYPE_ASSOCIATION_REQUEST	0x0013
873 #define TYPE_REASSOCIATION_REQUEST	0x0014
874 
875 #define HW_FEATURE_RFKILL 0x0001
876 #define RF_KILLSWITCH_OFF 1
877 #define RF_KILLSWITCH_ON  0
878 
879 #define IPW_COMMAND_POOL_SIZE        40
880 
881 #define IPW_START_ORD_TAB_1			1
882 #define IPW_START_ORD_TAB_2			1000
883 
884 #define IPW_ORD_TAB_1_ENTRY_SIZE		sizeof(u32)
885 
886 #define IS_ORDINAL_TABLE_ONE(mgr,id) \
887     ((id >= IPW_START_ORD_TAB_1) && (id < mgr->table1_size))
888 #define IS_ORDINAL_TABLE_TWO(mgr,id) \
889     ((id >= IPW_START_ORD_TAB_2) && (id < (mgr->table2_size + IPW_START_ORD_TAB_2)))
890 
891 #define BSS_ID_LENGTH               6
892 
893 // Fixed size data: Ordinal Table 1
894 typedef enum _ORDINAL_TABLE_1 {	// NS - means Not Supported by FW
895 // Transmit statistics
896 	IPW_ORD_STAT_TX_HOST_REQUESTS = 1,	// # of requested Host Tx's (MSDU)
897 	IPW_ORD_STAT_TX_HOST_COMPLETE,	// # of successful Host Tx's (MSDU)
898 	IPW_ORD_STAT_TX_DIR_DATA,	// # of successful Directed Tx's (MSDU)
899 
900 	IPW_ORD_STAT_TX_DIR_DATA1 = 4,	// # of successful Directed Tx's (MSDU) @ 1MB
901 	IPW_ORD_STAT_TX_DIR_DATA2,	// # of successful Directed Tx's (MSDU) @ 2MB
902 	IPW_ORD_STAT_TX_DIR_DATA5_5,	// # of successful Directed Tx's (MSDU) @ 5_5MB
903 	IPW_ORD_STAT_TX_DIR_DATA11,	// # of successful Directed Tx's (MSDU) @ 11MB
904 	IPW_ORD_STAT_TX_DIR_DATA22,	// # of successful Directed Tx's (MSDU) @ 22MB
905 
906 	IPW_ORD_STAT_TX_NODIR_DATA1 = 13,	// # of successful Non_Directed Tx's (MSDU) @ 1MB
907 	IPW_ORD_STAT_TX_NODIR_DATA2,	// # of successful Non_Directed Tx's (MSDU) @ 2MB
908 	IPW_ORD_STAT_TX_NODIR_DATA5_5,	// # of successful Non_Directed Tx's (MSDU) @ 5.5MB
909 	IPW_ORD_STAT_TX_NODIR_DATA11,	// # of successful Non_Directed Tx's (MSDU) @ 11MB
910 
911 	IPW_ORD_STAT_NULL_DATA = 21,	// # of successful NULL data Tx's
912 	IPW_ORD_STAT_TX_RTS,	// # of successful Tx RTS
913 	IPW_ORD_STAT_TX_CTS,	// # of successful Tx CTS
914 	IPW_ORD_STAT_TX_ACK,	// # of successful Tx ACK
915 	IPW_ORD_STAT_TX_ASSN,	// # of successful Association Tx's
916 	IPW_ORD_STAT_TX_ASSN_RESP,	// # of successful Association response Tx's
917 	IPW_ORD_STAT_TX_REASSN,	// # of successful Reassociation Tx's
918 	IPW_ORD_STAT_TX_REASSN_RESP,	// # of successful Reassociation response Tx's
919 	IPW_ORD_STAT_TX_PROBE,	// # of probes successfully transmitted
920 	IPW_ORD_STAT_TX_PROBE_RESP,	// # of probe responses successfully transmitted
921 	IPW_ORD_STAT_TX_BEACON,	// # of tx beacon
922 	IPW_ORD_STAT_TX_ATIM,	// # of Tx ATIM
923 	IPW_ORD_STAT_TX_DISASSN,	// # of successful Disassociation TX
924 	IPW_ORD_STAT_TX_AUTH,	// # of successful Authentication Tx
925 	IPW_ORD_STAT_TX_DEAUTH,	// # of successful Deauthentication TX
926 
927 	IPW_ORD_STAT_TX_TOTAL_BYTES = 41,	// Total successful Tx data bytes
928 	IPW_ORD_STAT_TX_RETRIES,	// # of Tx retries
929 	IPW_ORD_STAT_TX_RETRY1,	// # of Tx retries at 1MBPS
930 	IPW_ORD_STAT_TX_RETRY2,	// # of Tx retries at 2MBPS
931 	IPW_ORD_STAT_TX_RETRY5_5,	// # of Tx retries at 5.5MBPS
932 	IPW_ORD_STAT_TX_RETRY11,	// # of Tx retries at 11MBPS
933 
934 	IPW_ORD_STAT_TX_FAILURES = 51,	// # of Tx Failures
935 	IPW_ORD_STAT_TX_ABORT_AT_HOP,	//NS // # of Tx's aborted at hop time
936 	IPW_ORD_STAT_TX_MAX_TRIES_IN_HOP,	// # of times max tries in a hop failed
937 	IPW_ORD_STAT_TX_ABORT_LATE_DMA,	//NS // # of times tx aborted due to late dma setup
938 	IPW_ORD_STAT_TX_ABORT_STX,	//NS // # of times backoff aborted
939 	IPW_ORD_STAT_TX_DISASSN_FAIL,	// # of times disassociation failed
940 	IPW_ORD_STAT_TX_ERR_CTS,	// # of missed/bad CTS frames
941 	IPW_ORD_STAT_TX_BPDU,	//NS // # of spanning tree BPDUs sent
942 	IPW_ORD_STAT_TX_ERR_ACK,	// # of tx err due to acks
943 
944 	// Receive statistics
945 	IPW_ORD_STAT_RX_HOST = 61,	// # of packets passed to host
946 	IPW_ORD_STAT_RX_DIR_DATA,	// # of directed packets
947 	IPW_ORD_STAT_RX_DIR_DATA1,	// # of directed packets at 1MB
948 	IPW_ORD_STAT_RX_DIR_DATA2,	// # of directed packets at 2MB
949 	IPW_ORD_STAT_RX_DIR_DATA5_5,	// # of directed packets at 5.5MB
950 	IPW_ORD_STAT_RX_DIR_DATA11,	// # of directed packets at 11MB
951 	IPW_ORD_STAT_RX_DIR_DATA22,	// # of directed packets at 22MB
952 
953 	IPW_ORD_STAT_RX_NODIR_DATA = 71,	// # of nondirected packets
954 	IPW_ORD_STAT_RX_NODIR_DATA1,	// # of nondirected packets at 1MB
955 	IPW_ORD_STAT_RX_NODIR_DATA2,	// # of nondirected packets at 2MB
956 	IPW_ORD_STAT_RX_NODIR_DATA5_5,	// # of nondirected packets at 5.5MB
957 	IPW_ORD_STAT_RX_NODIR_DATA11,	// # of nondirected packets at 11MB
958 
959 	IPW_ORD_STAT_RX_NULL_DATA = 80,	// # of null data rx's
960 	IPW_ORD_STAT_RX_POLL,	//NS // # of poll rx
961 	IPW_ORD_STAT_RX_RTS,	// # of Rx RTS
962 	IPW_ORD_STAT_RX_CTS,	// # of Rx CTS
963 	IPW_ORD_STAT_RX_ACK,	// # of Rx ACK
964 	IPW_ORD_STAT_RX_CFEND,	// # of Rx CF End
965 	IPW_ORD_STAT_RX_CFEND_ACK,	// # of Rx CF End + CF Ack
966 	IPW_ORD_STAT_RX_ASSN,	// # of Association Rx's
967 	IPW_ORD_STAT_RX_ASSN_RESP,	// # of Association response Rx's
968 	IPW_ORD_STAT_RX_REASSN,	// # of Reassociation Rx's
969 	IPW_ORD_STAT_RX_REASSN_RESP,	// # of Reassociation response Rx's
970 	IPW_ORD_STAT_RX_PROBE,	// # of probe Rx's
971 	IPW_ORD_STAT_RX_PROBE_RESP,	// # of probe response Rx's
972 	IPW_ORD_STAT_RX_BEACON,	// # of Rx beacon
973 	IPW_ORD_STAT_RX_ATIM,	// # of Rx ATIM
974 	IPW_ORD_STAT_RX_DISASSN,	// # of disassociation Rx
975 	IPW_ORD_STAT_RX_AUTH,	// # of authentication Rx
976 	IPW_ORD_STAT_RX_DEAUTH,	// # of deauthentication Rx
977 
978 	IPW_ORD_STAT_RX_TOTAL_BYTES = 101,	// Total rx data bytes received
979 	IPW_ORD_STAT_RX_ERR_CRC,	// # of packets with Rx CRC error
980 	IPW_ORD_STAT_RX_ERR_CRC1,	// # of Rx CRC errors at 1MB
981 	IPW_ORD_STAT_RX_ERR_CRC2,	// # of Rx CRC errors at 2MB
982 	IPW_ORD_STAT_RX_ERR_CRC5_5,	// # of Rx CRC errors at 5.5MB
983 	IPW_ORD_STAT_RX_ERR_CRC11,	// # of Rx CRC errors at 11MB
984 
985 	IPW_ORD_STAT_RX_DUPLICATE1 = 112,	// # of duplicate rx packets at 1MB
986 	IPW_ORD_STAT_RX_DUPLICATE2,	// # of duplicate rx packets at 2MB
987 	IPW_ORD_STAT_RX_DUPLICATE5_5,	// # of duplicate rx packets at 5.5MB
988 	IPW_ORD_STAT_RX_DUPLICATE11,	// # of duplicate rx packets at 11MB
989 	IPW_ORD_STAT_RX_DUPLICATE = 119,	// # of duplicate rx packets
990 
991 	IPW_ORD_PERS_DB_LOCK = 120,	// # locking fw permanent  db
992 	IPW_ORD_PERS_DB_SIZE,	// # size of fw permanent  db
993 	IPW_ORD_PERS_DB_ADDR,	// # address of fw permanent  db
994 	IPW_ORD_STAT_RX_INVALID_PROTOCOL,	// # of rx frames with invalid protocol
995 	IPW_ORD_SYS_BOOT_TIME,	// # Boot time
996 	IPW_ORD_STAT_RX_NO_BUFFER,	// # of rx frames rejected due to no buffer
997 	IPW_ORD_STAT_RX_ABORT_LATE_DMA,	//NS // # of rx frames rejected due to dma setup too late
998 	IPW_ORD_STAT_RX_ABORT_AT_HOP,	//NS // # of rx frames aborted due to hop
999 	IPW_ORD_STAT_RX_MISSING_FRAG,	// # of rx frames dropped due to missing fragment
1000 	IPW_ORD_STAT_RX_ORPHAN_FRAG,	// # of rx frames dropped due to non-sequential fragment
1001 	IPW_ORD_STAT_RX_ORPHAN_FRAME,	// # of rx frames dropped due to unmatched 1st frame
1002 	IPW_ORD_STAT_RX_FRAG_AGEOUT,	// # of rx frames dropped due to uncompleted frame
1003 	IPW_ORD_STAT_RX_BAD_SSID,	//NS // Bad SSID (unused)
1004 	IPW_ORD_STAT_RX_ICV_ERRORS,	// # of ICV errors during decryption
1005 
1006 // PSP Statistics
1007 	IPW_ORD_STAT_PSP_SUSPENSION = 137,	// # of times adapter suspended
1008 	IPW_ORD_STAT_PSP_BCN_TIMEOUT,	// # of beacon timeout
1009 	IPW_ORD_STAT_PSP_POLL_TIMEOUT,	// # of poll response timeouts
1010 	IPW_ORD_STAT_PSP_NONDIR_TIMEOUT,	// # of timeouts waiting for last broadcast/muticast pkt
1011 	IPW_ORD_STAT_PSP_RX_DTIMS,	// # of PSP DTIMs received
1012 	IPW_ORD_STAT_PSP_RX_TIMS,	// # of PSP TIMs received
1013 	IPW_ORD_STAT_PSP_STATION_ID,	// PSP Station ID
1014 
1015 // Association and roaming
1016 	IPW_ORD_LAST_ASSN_TIME = 147,	// RTC time of last association
1017 	IPW_ORD_STAT_PERCENT_MISSED_BCNS,	// current calculation of % missed beacons
1018 	IPW_ORD_STAT_PERCENT_RETRIES,	// current calculation of % missed tx retries
1019 	IPW_ORD_ASSOCIATED_AP_PTR,	// If associated, this is ptr to the associated
1020 	// AP table entry. set to 0 if not associated
1021 	IPW_ORD_AVAILABLE_AP_CNT,	// # of AP's decsribed in the AP table
1022 	IPW_ORD_AP_LIST_PTR,	// Ptr to list of available APs
1023 	IPW_ORD_STAT_AP_ASSNS,	// # of associations
1024 	IPW_ORD_STAT_ASSN_FAIL,	// # of association failures
1025 	IPW_ORD_STAT_ASSN_RESP_FAIL,	// # of failuresdue to response fail
1026 	IPW_ORD_STAT_FULL_SCANS,	// # of full scans
1027 
1028 	IPW_ORD_CARD_DISABLED,	// # Card Disabled
1029 	IPW_ORD_STAT_ROAM_INHIBIT,	// # of times roaming was inhibited due to ongoing activity
1030 	IPW_FILLER_40,
1031 	IPW_ORD_RSSI_AT_ASSN = 160,	// RSSI of associated AP at time of association
1032 	IPW_ORD_STAT_ASSN_CAUSE1,	// # of reassociations due to no tx from AP in last N
1033 	// hops or no prob_ responses in last 3 minutes
1034 	IPW_ORD_STAT_ASSN_CAUSE2,	// # of reassociations due to poor tx/rx quality
1035 	IPW_ORD_STAT_ASSN_CAUSE3,	// # of reassociations due to tx/rx quality with excessive
1036 	// load at the AP
1037 	IPW_ORD_STAT_ASSN_CAUSE4,	// # of reassociations due to AP RSSI level fell below
1038 	// eligible group
1039 	IPW_ORD_STAT_ASSN_CAUSE5,	// # of reassociations due to load leveling
1040 	IPW_ORD_STAT_ASSN_CAUSE6,	//NS // # of reassociations due to dropped by Ap
1041 	IPW_FILLER_41,
1042 	IPW_FILLER_42,
1043 	IPW_FILLER_43,
1044 	IPW_ORD_STAT_AUTH_FAIL,	// # of times authentication failed
1045 	IPW_ORD_STAT_AUTH_RESP_FAIL,	// # of times authentication response failed
1046 	IPW_ORD_STATION_TABLE_CNT,	// # of entries in association table
1047 
1048 // Other statistics
1049 	IPW_ORD_RSSI_AVG_CURR = 173,	// Current avg RSSI
1050 	IPW_ORD_STEST_RESULTS_CURR,	//NS // Current self test results word
1051 	IPW_ORD_STEST_RESULTS_CUM,	//NS // Cummulative self test results word
1052 	IPW_ORD_SELF_TEST_STATUS,	//NS //
1053 	IPW_ORD_POWER_MGMT_MODE,	// Power mode - 0=CAM, 1=PSP
1054 	IPW_ORD_POWER_MGMT_INDEX,	//NS //
1055 	IPW_ORD_COUNTRY_CODE,	// IEEE country code as recv'd from beacon
1056 	IPW_ORD_COUNTRY_CHANNELS,	// channels suported by country
1057 // IPW_ORD_COUNTRY_CHANNELS:
1058 // For 11b the lower 2-byte are used for channels from 1-14
1059 //   and the higher 2-byte are not used.
1060 	IPW_ORD_RESET_CNT,	// # of adapter resets (warm)
1061 	IPW_ORD_BEACON_INTERVAL,	// Beacon interval
1062 
1063 	IPW_ORD_PRINCETON_VERSION = 184,	//NS // Princeton Version
1064 	IPW_ORD_ANTENNA_DIVERSITY,	// TRUE if antenna diversity is disabled
1065 	IPW_ORD_CCA_RSSI,	//NS // CCA RSSI value (factory programmed)
1066 	IPW_ORD_STAT_EEPROM_UPDATE,	//NS // # of times config EEPROM updated
1067 	IPW_ORD_DTIM_PERIOD,	// # of beacon intervals between DTIMs
1068 	IPW_ORD_OUR_FREQ,	// current radio freq lower digits - channel ID
1069 
1070 	IPW_ORD_RTC_TIME = 190,	// current RTC time
1071 	IPW_ORD_PORT_TYPE,	// operating mode
1072 	IPW_ORD_CURRENT_TX_RATE,	// current tx rate
1073 	IPW_ORD_SUPPORTED_RATES,	// Bitmap of supported tx rates
1074 	IPW_ORD_ATIM_WINDOW,	// current ATIM Window
1075 	IPW_ORD_BASIC_RATES,	// bitmap of basic tx rates
1076 	IPW_ORD_NIC_HIGHEST_RATE,	// bitmap of basic tx rates
1077 	IPW_ORD_AP_HIGHEST_RATE,	// bitmap of basic tx rates
1078 	IPW_ORD_CAPABILITIES,	// Management frame capability field
1079 	IPW_ORD_AUTH_TYPE,	// Type of authentication
1080 	IPW_ORD_RADIO_TYPE,	// Adapter card platform type
1081 	IPW_ORD_RTS_THRESHOLD = 201,	// Min length of packet after which RTS handshaking is used
1082 	IPW_ORD_INT_MODE,	// International mode
1083 	IPW_ORD_FRAGMENTATION_THRESHOLD,	// protocol frag threshold
1084 	IPW_ORD_EEPROM_SRAM_DB_BLOCK_START_ADDRESS,	// EEPROM offset in SRAM
1085 	IPW_ORD_EEPROM_SRAM_DB_BLOCK_SIZE,	// EEPROM size in SRAM
1086 	IPW_ORD_EEPROM_SKU_CAPABILITY,	// EEPROM SKU Capability    206 =
1087 	IPW_ORD_EEPROM_IBSS_11B_CHANNELS,	// EEPROM IBSS 11b channel set
1088 
1089 	IPW_ORD_MAC_VERSION = 209,	// MAC Version
1090 	IPW_ORD_MAC_REVISION,	// MAC Revision
1091 	IPW_ORD_RADIO_VERSION,	// Radio Version
1092 	IPW_ORD_NIC_MANF_DATE_TIME,	// MANF Date/Time STAMP
1093 	IPW_ORD_UCODE_VERSION,	// Ucode Version
1094 	IPW_ORD_HW_RF_SWITCH_STATE = 214,	// HW RF Kill Switch State
1095 } ORDINALTABLE1;
1096 
1097 // ordinal table 2
1098 // Variable length data:
1099 #define IPW_FIRST_VARIABLE_LENGTH_ORDINAL   1001
1100 
1101 typedef enum _ORDINAL_TABLE_2 {	// NS - means Not Supported by FW
1102 	IPW_ORD_STAT_BASE = 1000,	// contains number of variable ORDs
1103 	IPW_ORD_STAT_ADAPTER_MAC = 1001,	// 6 bytes: our adapter MAC address
1104 	IPW_ORD_STAT_PREFERRED_BSSID = 1002,	// 6 bytes: BSSID of the preferred AP
1105 	IPW_ORD_STAT_MANDATORY_BSSID = 1003,	// 6 bytes: BSSID of the mandatory AP
1106 	IPW_FILL_1,		//NS //
1107 	IPW_ORD_STAT_COUNTRY_TEXT = 1005,	// 36 bytes: Country name text, First two bytes are Country code
1108 	IPW_ORD_STAT_ASSN_SSID = 1006,	// 32 bytes: ESSID String
1109 	IPW_ORD_STATION_TABLE = 1007,	// ? bytes: Station/AP table (via Direct SSID Scans)
1110 	IPW_ORD_STAT_SWEEP_TABLE = 1008,	// ? bytes: Sweep/Host Table table (via Broadcast Scans)
1111 	IPW_ORD_STAT_ROAM_LOG = 1009,	// ? bytes: Roaming log
1112 	IPW_ORD_STAT_RATE_LOG = 1010,	//NS // 0 bytes: Rate log
1113 	IPW_ORD_STAT_FIFO = 1011,	//NS // 0 bytes: Fifo buffer data structures
1114 	IPW_ORD_STAT_FW_VER_NUM = 1012,	// 14 bytes: fw version ID string as in (a.bb.ccc; "0.08.011")
1115 	IPW_ORD_STAT_FW_DATE = 1013,	// 14 bytes: fw date string (mmm dd yyyy; "Mar 13 2002")
1116 	IPW_ORD_STAT_ASSN_AP_BSSID = 1014,	// 6 bytes: MAC address of associated AP
1117 	IPW_ORD_STAT_DEBUG = 1015,	//NS // ? bytes:
1118 	IPW_ORD_STAT_NIC_BPA_NUM = 1016,	// 11 bytes: NIC BPA number in ASCII
1119 	IPW_ORD_STAT_UCODE_DATE = 1017,	// 5 bytes: uCode date
1120 	IPW_ORD_SECURITY_NGOTIATION_RESULT = 1018,
1121 } ORDINALTABLE2;		// NS - means Not Supported by FW
1122 
1123 #define IPW_LAST_VARIABLE_LENGTH_ORDINAL   1018
1124 
1125 #ifndef WIRELESS_SPY
1126 #define WIRELESS_SPY		// enable iwspy support
1127 #endif
1128 
1129 #define IPW_HOST_FW_SHARED_AREA0 	0x0002f200
1130 #define IPW_HOST_FW_SHARED_AREA0_END 	0x0002f510	// 0x310 bytes
1131 
1132 #define IPW_HOST_FW_SHARED_AREA1 	0x0002f610
1133 #define IPW_HOST_FW_SHARED_AREA1_END 	0x0002f630	// 0x20 bytes
1134 
1135 #define IPW_HOST_FW_SHARED_AREA2 	0x0002fa00
1136 #define IPW_HOST_FW_SHARED_AREA2_END 	0x0002fa20	// 0x20 bytes
1137 
1138 #define IPW_HOST_FW_SHARED_AREA3 	0x0002fc00
1139 #define IPW_HOST_FW_SHARED_AREA3_END 	0x0002fc10	// 0x10 bytes
1140 
1141 #define IPW_HOST_FW_INTERRUPT_AREA 	0x0002ff80
1142 #define IPW_HOST_FW_INTERRUPT_AREA_END 	0x00030000	// 0x80 bytes
1143 
1144 struct ipw2100_fw_chunk {
1145 	unsigned char *buf;
1146 	long len;
1147 	long pos;
1148 	struct list_head list;
1149 };
1150 
1151 struct ipw2100_fw_chunk_set {
1152 	const void *data;
1153 	unsigned long size;
1154 };
1155 
1156 struct ipw2100_fw {
1157 	int version;
1158 	struct ipw2100_fw_chunk_set fw;
1159 	struct ipw2100_fw_chunk_set uc;
1160 	const struct firmware *fw_entry;
1161 };
1162 
1163 #define MAX_FW_VERSION_LEN 14
1164 
1165 #endif				/* _IPW2100_H */
1166