1 /* MN10300 cache management registers 2 * 3 * Copyright (C) 2007 Red Hat, Inc. All Rights Reserved. 4 * Written by David Howells (dhowells@redhat.com) 5 * 6 * This program is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU General Public Licence 8 * as published by the Free Software Foundation; either version 9 * 2 of the Licence, or (at your option) any later version. 10 */ 11 12 #ifndef _ASM_CACHE_H 13 #define _ASM_CACHE_H 14 15 #include <asm/cpu-regs.h> 16 #include <proc/cache.h> 17 18 #ifndef __ASSEMBLY__ 19 #define L1_CACHE_DISPARITY (L1_CACHE_NENTRIES * L1_CACHE_BYTES) 20 #else 21 #define L1_CACHE_DISPARITY L1_CACHE_NENTRIES * L1_CACHE_BYTES 22 #endif 23 24 #define ARCH_DMA_MINALIGN L1_CACHE_BYTES 25 26 /* data cache purge registers 27 * - read from the register to unconditionally purge that cache line 28 * - write address & 0xffffff00 to conditionally purge that cache line 29 * - clear LSB to request invalidation as well 30 */ 31 #define DCACHE_PURGE(WAY, ENTRY) \ 32 __SYSREG(0xc8400000 + (WAY) * L1_CACHE_WAYDISP + \ 33 (ENTRY) * L1_CACHE_BYTES, u32) 34 35 #define DCACHE_PURGE_WAY0(ENTRY) \ 36 __SYSREG(0xc8400000 + 0 * L1_CACHE_WAYDISP + (ENTRY) * L1_CACHE_BYTES, u32) 37 #define DCACHE_PURGE_WAY1(ENTRY) \ 38 __SYSREG(0xc8400000 + 1 * L1_CACHE_WAYDISP + (ENTRY) * L1_CACHE_BYTES, u32) 39 #define DCACHE_PURGE_WAY2(ENTRY) \ 40 __SYSREG(0xc8400000 + 2 * L1_CACHE_WAYDISP + (ENTRY) * L1_CACHE_BYTES, u32) 41 #define DCACHE_PURGE_WAY3(ENTRY) \ 42 __SYSREG(0xc8400000 + 3 * L1_CACHE_WAYDISP + (ENTRY) * L1_CACHE_BYTES, u32) 43 44 /* instruction cache access registers */ 45 #define ICACHE_DATA(WAY, ENTRY, OFF) \ 46 __SYSREG(0xc8000000 + (WAY) * L1_CACHE_WAYDISP + \ 47 (ENTRY) * L1_CACHE_BYTES + (OFF) * 4, u32) 48 #define ICACHE_TAG(WAY, ENTRY) \ 49 __SYSREG(0xc8100000 + (WAY) * L1_CACHE_WAYDISP + \ 50 (ENTRY) * L1_CACHE_BYTES, u32) 51 52 /* data cache access registers */ 53 #define DCACHE_DATA(WAY, ENTRY, OFF) \ 54 __SYSREG(0xc8200000 + (WAY) * L1_CACHE_WAYDISP + \ 55 (ENTRY) * L1_CACHE_BYTES + (OFF) * 4, u32) 56 #define DCACHE_TAG(WAY, ENTRY) \ 57 __SYSREG(0xc8300000 + (WAY) * L1_CACHE_WAYDISP + \ 58 (ENTRY) * L1_CACHE_BYTES, u32) 59 60 #endif /* _ASM_CACHE_H */ 61