Searched refs:HSYNC_A (Results 1 – 10 of 10) sorted by relevance
720 int hsync_reg = (pipe == 0) ? HSYNC_A : HSYNC_B; in cdv_intel_crtc_mode_set()986 crtc_state->saveHSYNC = REG_READ(pipeA ? HSYNC_A : HSYNC_B); in cdv_intel_crtc_save()1052 REG_READ(pipeA ? HSYNC_A : HSYNC_B), in cdv_intel_crtc_restore()1104 REG_WRITE(pipeA ? HSYNC_A : HSYNC_B, crtc_state->saveHSYNC); in cdv_intel_crtc_restore()1394 hsync = REG_READ((pipe == 0) ? HSYNC_A : HSYNC_B); in cdv_intel_crtc_mode_get()
211 regs->psb.saveHSYNC_A = PSB_RVDC32(HSYNC_A); in oaktrail_save_display_registers()330 PSB_WVDC32(regs->psb.saveHSYNC_A, HSYNC_A); in oaktrail_restore_display_registers()
601 int hsync_reg = (pipe == 0) ? HSYNC_A : HSYNC_B; in psb_intel_crtc_mode_set()878 crtc_state->saveHSYNC = REG_READ(pipeA ? HSYNC_A : HSYNC_B); in psb_intel_crtc_save()934 REG_WRITE(pipeA ? HSYNC_A : HSYNC_B, crtc_state->saveHSYNC); in psb_intel_crtc_restore()1208 hsync = REG_READ((pipe == 0) ? HSYNC_A : HSYNC_B); in psb_intel_crtc_mode_get()
178 u32 hsync_reg = HSYNC_A; in mdfld_save_display_registers()370 u32 hsync_reg = HSYNC_A; in mdfld_restore_display_registers()
301 int hsync_reg = (pipe == 0) ? HSYNC_A : HSYNC_B; in oaktrail_crtc_mode_set()
131 #define HSYNC_A 0x60008 macro
773 int hsync_reg = HSYNC_A; in mdfld_crtc_mode_set()
799 REG_WRITE(HSYNC_A, in mdfld_set_pipe_timing()
203 #define HSYNC_A 0x60008 macro
555 hw->hsync_a = INREG(HSYNC_A); in intelfbhw_read_hw_state()1347 hsync_reg = HSYNC_A; in intelfbhw_program_mode()