Searched refs:GMBUS0 (Results 1 – 4 of 4) sorted by relevance
55 I915_WRITE(GMBUS0, 0); in intel_i2c_reset()222 reg_offset = HAS_PCH_SPLIT(dev_priv->dev) ? PCH_GMBUS0 - GMBUS0 : 0; in gmbus_xfer()224 I915_WRITE(GMBUS0 + reg_offset, bus->reg0); in gmbus_xfer()308 I915_WRITE(GMBUS0 + reg_offset, 0); in gmbus_xfer()315 I915_WRITE(GMBUS0 + reg_offset, 0); in gmbus_xfer()
765 #define GMBUS0 0x5100 /* clock/port select */ macro
75 REG_WRITE(GMBUS0, 0); in gma_intel_i2c_reset()264 REG_WRITE(GMBUS0 + reg_offset, bus->reg0); in gmbus_xfer()343 REG_WRITE(GMBUS0 + reg_offset, 0); in gmbus_xfer()349 REG_WRITE(GMBUS0 + reg_offset, 0); in gmbus_xfer()
46 #define GMBUS0 0x5100 /* clock/port select */ macro