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Searched refs:EXYNOS5_MPLL_CON0 (Results 1 – 2 of 2) sorted by relevance

/linux-3.4.99/arch/arm/mach-exynos/include/mach/
Dregs-clock.h267 #define EXYNOS5_MPLL_CON0 EXYNOS_CLKREG(0x04100) macro
/linux-3.4.99/arch/arm/mach-exynos/
Dclock-exynos5.c1166 mpll = s5p_get_pll35xx(xtal, __raw_readl(EXYNOS5_MPLL_CON0)); in exynos5_setup_clocks()