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Searched refs:EXYNOS5_CLKSRC_GSCL (Results 1 – 2 of 2) sorted by relevance

/linux-3.4.99/arch/arm/mach-exynos/
Dclock-exynos5.c900 .reg_src = { .reg = EXYNOS5_CLKSRC_GSCL, .shift = 24, .size = 4 },
910 .reg_src = { .reg = EXYNOS5_CLKSRC_GSCL, .shift = 28, .size = 4 },
919 .reg_src = { .reg = EXYNOS5_CLKSRC_GSCL, .shift = 16, .size = 4 },
928 .reg_src = { .reg = EXYNOS5_CLKSRC_GSCL, .shift = 20, .size = 4 },
/linux-3.4.99/arch/arm/mach-exynos/include/mach/
Dregs-clock.h283 #define EXYNOS5_CLKSRC_GSCL EXYNOS_CLKREG(0x10220) macro