Searched refs:EXYNOS5_CLKDIV_GSCL (Results 1 – 2 of 2) sorted by relevance
| /linux-3.4.99/arch/arm/mach-exynos/ |
| D | clock-exynos5.c | 901 .reg_div = { .reg = EXYNOS5_CLKDIV_GSCL, .shift = 24, .size = 4 },
911 .reg_div = { .reg = EXYNOS5_CLKDIV_GSCL, .shift = 28, .size = 4 },
920 .reg_div = { .reg = EXYNOS5_CLKDIV_GSCL, .shift = 16, .size = 4 },
929 .reg_div = { .reg = EXYNOS5_CLKDIV_GSCL, .shift = 20, .size = 4 },
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| /linux-3.4.99/arch/arm/mach-exynos/include/mach/ |
| D | regs-clock.h | 296 #define EXYNOS5_CLKDIV_GSCL EXYNOS_CLKREG(0x10520) macro
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