Searched refs:END_FTR_SECTION_IFSET (Results 1 – 24 of 24) sorted by relevance
38 END_FTR_SECTION_IFSET(CPU_FTR_CAN_NAP)47 END_FTR_SECTION_IFSET(CPU_FTR_NAP_DISABLE_L2_PR)52 END_FTR_SECTION_IFSET(CPU_FTR_DUAL_PLL_750FX)66 END_FTR_SECTION_IFSET(CPU_FTR_CAN_DOZE)83 END_FTR_SECTION_IFSET(CPU_FTR_CAN_NAP)108 END_FTR_SECTION_IFSET(CPU_FTR_NAP_DISABLE_L2_PR)120 END_FTR_SECTION_IFSET(CPU_FTR_DUAL_PLL_750FX)127 END_FTR_SECTION_IFSET(CPU_FTR_CAN_DOZE)137 END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)180 END_FTR_SECTION_IFSET(CPU_FTR_NAP_DISABLE_L2_PR)[all …]
112 END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)176 END_FTR_SECTION_IFSET(CPU_FTR_SPEC7450)232 END_FTR_SECTION_IFSET(CPU_FTR_SPEC7450)261 END_FTR_SECTION_IFSET(CPU_FTR_SPEC7450)282 END_FTR_SECTION_IFSET(CPU_FTR_L2CR)401 END_FTR_SECTION_IFSET(CPU_FTR_L3CR)417 END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
32 END_FTR_SECTION_IFSET(CPU_FTR_VSX); \41 END_FTR_SECTION_IFSET(CPU_FTR_VSX); \64 END_FTR_SECTION_IFSET(CPU_FTR_VSX)131 END_FTR_SECTION_IFSET(CPU_FTR_VSX)152 END_FTR_SECTION_IFSET(CPU_FTR_VSX)
44 END_FTR_SECTION_IFSET(CPU_FTR_CAN_DOZE)60 END_FTR_SECTION_IFSET(CPU_FTR_CAN_NAP)69 END_FTR_SECTION_IFSET(CPU_FTR_L2CSR|CPU_FTR_CAN_NAP)
170 END_FTR_SECTION_IFSET(CPU_FTR_NO_BTIC)173 END_FTR_SECTION_IFSET(CPU_FTR_NO_DPM)227 END_FTR_SECTION_IFSET(CPU_FTR_L3CR)247 END_FTR_SECTION_IFSET(CPU_FTR_NO_BTIC)250 END_FTR_SECTION_IFSET(CPU_FTR_NO_DPM)
61 END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
414 END_FTR_SECTION_IFSET(CPU_FTR_VSX)421 END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)427 END_FTR_SECTION_IFSET(CPU_FTR_DSCR)456 END_FTR_SECTION_IFSET(CPU_FTR_STCX_CHECKS_ADDRESS)525 END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)539 END_FTR_SECTION_IFSET(CPU_FTR_DSCR)
405 END_FTR_SECTION_IFSET(CPU_FTR_NEED_PAIRED_STWCX)675 END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)682 END_FTR_SECTION_IFSET(CPU_FTR_SPE)715 END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)721 END_FTR_SECTION_IFSET(CPU_FTR_SPE)786 END_FTR_SECTION_IFSET(CPU_FTR_601)930 END_FTR_SECTION_IFSET(CPU_FTR_NEED_PAIRED_STWCX)1247 END_FTR_SECTION_IFSET(CPU_FTR_601)
79 END_FTR_SECTION_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206)213 END_FTR_SECTION_IFSET(CPU_FTR_REAL_LE)559 END_FTR_SECTION_IFSET(CPU_FTR_CFAR)809 END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)826 END_FTR_SECTION_IFSET(CPU_FTR_VSX)
306 END_FTR_SECTION_IFSET(CPU_FTR_UNIFIED_ID_CACHE)333 END_FTR_SECTION_IFSET(CPU_FTR_COHERENT_ICACHE)436 END_FTR_SECTION_IFSET(CPU_FTR_COHERENT_ICACHE)477 END_FTR_SECTION_IFSET(CPU_FTR_COHERENT_ICACHE)
128 END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
140 END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
443 END_FTR_SECTION_IFSET(CPU_FTR_FPU_UNAVAILABLE)
58 END_FTR_SECTION_IFSET(CPU_FTR_ARCH_206)96 END_FTR_SECTION_IFSET(CPU_FTR_ARCH_201)106 END_FTR_SECTION_IFSET(CPU_FTR_ARCH_201)138 END_FTR_SECTION_IFSET(CPU_FTR_ARCH_201)
166 END_FTR_SECTION_IFSET(CPU_FTR_ARCH_201)176 END_FTR_SECTION_IFSET(CPU_FTR_ARCH_201)192 END_FTR_SECTION_IFSET(CPU_FTR_ARCH_206)243 END_FTR_SECTION_IFSET(CPU_FTR_ARCH_206)253 END_FTR_SECTION_IFSET(CPU_FTR_ARCH_201)480 END_FTR_SECTION_IFSET(CPU_FTR_ARCH_206)611 END_FTR_SECTION_IFSET(CPU_FTR_ARCH_206)626 END_FTR_SECTION_IFSET(CPU_FTR_ARCH_206)649 END_FTR_SECTION_IFSET(CPU_FTR_ARCH_206)669 END_FTR_SECTION_IFSET(CPU_FTR_ARCH_206)[all …]
207 END_FTR_SECTION_IFSET(CPU_FTR_HVMODE)258 END_FTR_SECTION_IFSET(CPU_FTR_HVMODE)351 END_FTR_SECTION_IFSET(CPU_FTR_HVMODE)
35 END_FTR_SECTION_IFSET(CPU_FTR_SPEC7450)38 END_FTR_SECTION_IFSET(CPU_FTR_L2CR)57 END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)348 END_FTR_SECTION_IFSET(CPU_FTR_L3CR)
183 END_FTR_SECTION_IFSET(CPU_FTR_SPEC7450)
41 END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)47 The END_FTR_SECTION macro has two simpler variations: END_FTR_SECTION_IFSET
300 END_FTR_SECTION_IFSET(CPU_FTR_CTRL)339 END_FTR_SECTION_IFSET(CPU_FTR_CAN_NAP)
69 #define END_FTR_SECTION_IFSET(msk) END_FTR_SECTION((msk), (msk)) macro
340 END_FTR_SECTION_IFSET(CPU_FTR_601)344 END_FTR_SECTION_IFSET(CPU_FTR_601)348 END_FTR_SECTION_IFSET(CPU_FTR_601)
35 END_FTR_SECTION_IFSET(CPU_FTR_CP_USE_DCBTZ)
218 END_FTR_SECTION_IFSET(CPU_FTR_476_DD2)