Searched refs:EMAC_MMC_TIRQS (Results 1 – 7 of 7) sorted by relevance
77 #define bfin_read_EMAC_MMC_TIRQS() bfin_read32(EMAC_MMC_TIRQS)78 #define bfin_write_EMAC_MMC_TIRQS(val) bfin_write32(EMAC_MMC_TIRQS, val)
47 #define EMAC_MMC_TIRQS 0xFFC0308C /* MMC TX Interrupt Status Register … macro
77 #define bfin_read_EMAC_MMC_TIRQS() bfin_read32(EMAC_MMC_TIRQS)78 #define bfin_write_EMAC_MMC_TIRQS(val) bfin_write32(EMAC_MMC_TIRQS,val)
50 #define EMAC_MMC_TIRQS 0xFFC0308C /* MMC TX Interrupt Status Register … macro
48 #define EMAC_MMC_TIRQS 0xFFC0308C /* MMC TX Interrupt Status Register … macro
947 D32(EMAC_MMC_TIRQS); in bfin_debug_mmrs_init()