Searched refs:DSPBBASE (Results 1 – 7 of 7) sorted by relevance
487 int dspbase = (pipe == 0 ? DSPABASE : DSPBBASE); in cdv_intel_pipe_set_base()569 int dspbase_reg = (pipe == 0) ? DSPABASE : DSPBBASE; in cdv_intel_crtc_dpms()996 crtc_state->saveDSPBASE = REG_READ(pipeA ? DSPABASE : DSPBBASE); in cdv_intel_crtc_save()1059 REG_READ(pipeA ? DSPABASE : DSPBBASE) in cdv_intel_crtc_restore()1114 REG_WRITE(pipeA ? DSPABASE : DSPBBASE, crtc_state->saveDSPBASE); in cdv_intel_crtc_restore()1120 REG_WRITE(pipeA ? DSPABASE : DSPBBASE, crtc_state->saveDSPBASE); in cdv_intel_crtc_restore()
345 int dspbase = (pipe == 0 ? DSPABASE : DSPBBASE); in psb_intel_pipe_set_base()433 int dspbase_reg = (pipe == 0) ? DSPABASE : DSPBBASE; in psb_intel_crtc_dpms()888 crtc_state->saveDSPBASE = REG_READ(pipeA ? DSPABASE : DSPBBASE); in psb_intel_crtc_save()944 REG_WRITE(pipeA ? DSPABASE : DSPBBASE, crtc_state->saveDSPBASE); in psb_intel_crtc_restore()950 REG_WRITE(pipeA ? DSPABASE : DSPBBASE, crtc_state->saveDSPBASE); in psb_intel_crtc_restore()
169 int dspbase_reg = (pipe == 0) ? MRST_DSPABASE : DSPBBASE; in oaktrail_crtc_dpms()517 int dspbase = (pipe == 0 ? DSPALINOFF : DSPBBASE); in oaktrail_pipe_set_base()
616 #define DSPBBASE 0x71184 macro618 #define DSPBADDR DSPBBASE
474 regs->saveDSPBADDR = PSB_RVDC32(DSPBBASE); in oaktrail_hdmi_save()
422 #define DSPBBASE 0x71184 macro
616 hw->disp_b_base = INREG(DSPBBASE); in intelfbhw_read_hw_state()