Searched refs:DSPABASE (Results 1 – 7 of 7) sorted by relevance
/linux-3.4.99/drivers/gpu/drm/gma500/ |
D | cdv_intel_display.c | 487 int dspbase = (pipe == 0 ? DSPABASE : DSPBBASE); in cdv_intel_pipe_set_base() 569 int dspbase_reg = (pipe == 0) ? DSPABASE : DSPBBASE; in cdv_intel_crtc_dpms() 996 crtc_state->saveDSPBASE = REG_READ(pipeA ? DSPABASE : DSPBBASE); in cdv_intel_crtc_save() 1059 REG_READ(pipeA ? DSPABASE : DSPBBASE) in cdv_intel_crtc_restore() 1114 REG_WRITE(pipeA ? DSPABASE : DSPBBASE, crtc_state->saveDSPBASE); in cdv_intel_crtc_restore() 1120 REG_WRITE(pipeA ? DSPABASE : DSPBBASE, crtc_state->saveDSPBASE); in cdv_intel_crtc_restore()
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D | psb_intel_display.c | 345 int dspbase = (pipe == 0 ? DSPABASE : DSPBBASE); in psb_intel_pipe_set_base() 433 int dspbase_reg = (pipe == 0) ? DSPABASE : DSPBBASE; in psb_intel_crtc_dpms() 888 crtc_state->saveDSPBASE = REG_READ(pipeA ? DSPABASE : DSPBBASE); in psb_intel_crtc_save() 944 REG_WRITE(pipeA ? DSPABASE : DSPBBASE, crtc_state->saveDSPBASE); in psb_intel_crtc_restore() 950 REG_WRITE(pipeA ? DSPABASE : DSPBBASE, crtc_state->saveDSPBASE); in psb_intel_crtc_restore()
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D | oaktrail_device.c | 218 regs->psb.saveDSPAADDR = PSB_RVDC32(DSPABASE); in oaktrail_save_display_registers()
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D | psb_intel_reg.h | 612 #define DSPABASE 0x70184 macro
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D | mdfld_dsi_dpi.c | 871 REG_WRITE(DSPABASE, 0x00); in mdfld_dsi_dpi_mode_set()
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/linux-3.4.99/drivers/video/intelfb/ |
D | intelfbhw.c | 408 OUTREG(DSPABASE, offset); in intelfbhw_pan_display() 432 tmp = INREG(DSPABASE); in intelfbhw_do_blank() 433 OUTREG(DSPABASE, tmp); in intelfbhw_do_blank() 615 hw->disp_a_base = INREG(DSPABASE); in intelfbhw_read_hw_state() 1472 OUTREG(DSPABASE, hw->disp_a_base); in intelfbhw_program_mode() 1479 OUTREG(DSPABASE, hw->disp_a_base); in intelfbhw_program_mode() 2033 OUTREG(DSPABASE, dinfo->vsync.pan_offset); in intelfbhw_irq() 2078 OUTREG(DSPABASE, dinfo->vsync.pan_offset); in intelfbhw_disable_irq()
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D | intelfbhw.h | 419 #define DSPABASE 0x70184 macro
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