Searched refs:DPG_PIPE_LATENCY_CONTROL (Results 1 – 2 of 2) sorted by relevance
246 #define DPG_PIPE_LATENCY_CONTROL 0x6ccc macro
839 WREG32(DPG_PIPE_LATENCY_CONTROL + radeon_crtc->crtc_offset, in dce6_program_watermarks()847 WREG32(DPG_PIPE_LATENCY_CONTROL + radeon_crtc->crtc_offset, in dce6_program_watermarks()