| /linux-3.4.99/arch/arm/mach-shmobile/ |
| D | clock-r8a7779.c | 72 enum { DIV4_S, DIV4_OUT, DIV4_S4, DIV4_S3, DIV4_S1, DIV4_P, DIV4_NR }; enumerator
74 static struct clk div4_clks[DIV4_NR] = {
162 ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table); in r8a7779_clock_init()
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| D | clock-r8a7740.c | 227 DIV4_NR enumerator
230 struct clk div4_clks[DIV4_NR] = {
368 ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table); in r8a7740_clock_init()
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| D | clock-sh7367.c | 177 DIV4_ZS, DIV4_ZB, DIV4_ZB3, DIV4_CP, DIV4_NR }; enumerator
182 static struct clk div4_clks[DIV4_NR] = {
341 ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table); in sh7367_clock_init()
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| D | clock-sh7377.c | 187 DIV4_ZS, DIV4_ZB, DIV4_ZB3, DIV4_CP, DIV4_NR }; enumerator
192 static struct clk div4_clks[DIV4_NR] = {
352 ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table); in sh7377_clock_init()
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| D | clock-sh73a0.c | 261 DIV4_Z, DIV4_ZTR, DIV4_ZT, DIV4_ZX, DIV4_HP, DIV4_NR }; enumerator
266 static struct clk div4_clks[DIV4_NR] = {
609 ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table); in sh73a0_clock_init()
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| D | clock-sh7372.c | 347 DIV4_DDRP, DIV4_NR }; enumerator
352 static struct clk div4_clks[DIV4_NR] = {
698 ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table); in sh7372_clock_init()
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| /linux-3.4.99/arch/sh/kernel/cpu/sh4a/ |
| D | clock-sh7722.c | 123 enum { DIV4_I, DIV4_U, DIV4_SH, DIV4_B, DIV4_B3, DIV4_P, DIV4_NR }; enumerator
125 struct clk div4_clks[DIV4_NR] = {
250 ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table); in arch_clk_init()
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| D | clock-sh7757.c | 63 enum { DIV4_I, DIV4_SH, DIV4_P, DIV4_NR }; enumerator
68 struct clk div4_clks[DIV4_NR] = {
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| D | clock-shx3.c | 62 enum { DIV4_I, DIV4_SH, DIV4_B, DIV4_DDR, DIV4_SHA, DIV4_P, DIV4_NR }; enumerator
67 struct clk div4_clks[DIV4_NR] = {
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| D | clock-sh7366.c | 118 DIV4_SIUA, DIV4_SIUB, DIV4_NR }; enumerator
123 struct clk div4_clks[DIV4_NR] = {
273 ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table); in arch_clk_init()
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| D | clock-sh7343.c | 115 DIV4_SIUA, DIV4_SIUB, DIV4_NR }; enumerator
120 struct clk div4_clks[DIV4_NR] = {
280 ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table); in arch_clk_init()
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| D | clock-sh7723.c | 121 enum { DIV4_I, DIV4_U, DIV4_SH, DIV4_B, DIV4_B3, DIV4_P, DIV4_NR }; enumerator
126 struct clk div4_clks[DIV4_NR] = {
300 ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table); in arch_clk_init()
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| D | clock-sh7785.c | 67 DIV4_DU, DIV4_P, DIV4_NR }; enumerator
72 struct clk div4_clks[DIV4_NR] = {
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| D | clock-sh7786.c | 68 enum { DIV4_I, DIV4_SH, DIV4_B, DIV4_DDR, DIV4_DU, DIV4_P, DIV4_NR }; enumerator
73 struct clk div4_clks[DIV4_NR] = {
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| D | clock-sh7724.c | 160 enum { DIV4_I, DIV4_SH, DIV4_B, DIV4_P, DIV4_M1, DIV4_NR }; enumerator
165 struct clk div4_clks[DIV4_NR] = {
372 ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table); in arch_clk_init()
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