Searched refs:CVMX_CIU_INTX_EN0 (Results 1 – 3 of 3) sorted by relevance
242 cvmx_write_csr(CVMX_CIU_INTX_EN0(coreid * 2), *pen); in octeon_irq_ciu_enable()265 cvmx_write_csr(CVMX_CIU_INTX_EN0(cvmx_get_core_num() * 2), *pen); in octeon_irq_ciu_enable_local()288 cvmx_write_csr(CVMX_CIU_INTX_EN0(cvmx_get_core_num() * 2), *pen); in octeon_irq_ciu_disable_local()316 cvmx_write_csr(CVMX_CIU_INTX_EN0(coreid * 2), *pen); in octeon_irq_ciu_disable_all()346 cvmx_write_csr(CVMX_CIU_INTX_EN0(coreid * 2), *pen); in octeon_irq_ciu_enable_all()566 cvmx_write_csr(CVMX_CIU_INTX_EN0(coreid * 2), *pen); in octeon_irq_ciu_set_affinity()865 cvmx_write_csr(CVMX_CIU_INTX_EN0((coreid * 2)), 0); in octeon_irq_init_ciu_percpu()866 cvmx_write_csr(CVMX_CIU_INTX_EN0((coreid * 2 + 1)), 0); in octeon_irq_init_ciu_percpu()
364 octeon_wdt_write_hex(cvmx_read_csr(CVMX_CIU_INTX_EN0(coreid * 2)), 16); in octeon_wdt_nmi_stage3()
37 #define CVMX_CIU_INTX_EN0(offset) (CVMX_ADD_IO_SEG(0x0001070000000200ull) + ((offset) & 63) * 16) macro