Searched refs:CP_RB1_BASE (Results 1 – 4 of 4) sorted by relevance
413 #define CP_RB1_BASE 0xC180 macro
650 #define CP_RB1_BASE 0xC180 macro
1397 WREG32(CP_RB1_BASE, ring->gpu_addr >> 8); in cayman_cp_resume()
2177 WREG32(CP_RB1_BASE, ring->gpu_addr >> 8); in si_cp_resume()