1 #ifndef __ASM_ARM_CP15_H
2 #define __ASM_ARM_CP15_H
3
4 #include <asm/barrier.h>
5
6 /*
7 * CR1 bits (CP#15 CR1)
8 */
9 #define CR_M (1 << 0) /* MMU enable */
10 #define CR_A (1 << 1) /* Alignment abort enable */
11 #define CR_C (1 << 2) /* Dcache enable */
12 #define CR_W (1 << 3) /* Write buffer enable */
13 #define CR_P (1 << 4) /* 32-bit exception handler */
14 #define CR_D (1 << 5) /* 32-bit data address range */
15 #define CR_L (1 << 6) /* Implementation defined */
16 #define CR_B (1 << 7) /* Big endian */
17 #define CR_S (1 << 8) /* System MMU protection */
18 #define CR_R (1 << 9) /* ROM MMU protection */
19 #define CR_F (1 << 10) /* Implementation defined */
20 #define CR_Z (1 << 11) /* Implementation defined */
21 #define CR_I (1 << 12) /* Icache enable */
22 #define CR_V (1 << 13) /* Vectors relocated to 0xffff0000 */
23 #define CR_RR (1 << 14) /* Round Robin cache replacement */
24 #define CR_L4 (1 << 15) /* LDR pc can set T bit */
25 #define CR_DT (1 << 16)
26 #define CR_IT (1 << 18)
27 #define CR_ST (1 << 19)
28 #define CR_FI (1 << 21) /* Fast interrupt (lower latency mode) */
29 #define CR_U (1 << 22) /* Unaligned access operation */
30 #define CR_XP (1 << 23) /* Extended page tables */
31 #define CR_VE (1 << 24) /* Vectored interrupts */
32 #define CR_EE (1 << 25) /* Exception (Big) Endian */
33 #define CR_TRE (1 << 28) /* TEX remap enable */
34 #define CR_AFE (1 << 29) /* Access flag enable */
35 #define CR_TE (1 << 30) /* Thumb exception enable */
36
37 #ifndef __ASSEMBLY__
38
39 #if __LINUX_ARM_ARCH__ >= 4
40 #define vectors_high() (cr_alignment & CR_V)
41 #else
42 #define vectors_high() (0)
43 #endif
44
45 extern unsigned long cr_no_alignment; /* defined in entry-armv.S */
46 extern unsigned long cr_alignment; /* defined in entry-armv.S */
47
get_cr(void)48 static inline unsigned int get_cr(void)
49 {
50 unsigned int val;
51 asm("mrc p15, 0, %0, c1, c0, 0 @ get CR" : "=r" (val) : : "cc");
52 return val;
53 }
54
set_cr(unsigned int val)55 static inline void set_cr(unsigned int val)
56 {
57 asm volatile("mcr p15, 0, %0, c1, c0, 0 @ set CR"
58 : : "r" (val) : "cc");
59 isb();
60 }
61
62 #ifndef CONFIG_SMP
63 extern void adjust_cr(unsigned long mask, unsigned long set);
64 #endif
65
66 #define CPACC_FULL(n) (3 << (n * 2))
67 #define CPACC_SVC(n) (1 << (n * 2))
68 #define CPACC_DISABLE(n) (0 << (n * 2))
69
get_copro_access(void)70 static inline unsigned int get_copro_access(void)
71 {
72 unsigned int val;
73 asm("mrc p15, 0, %0, c1, c0, 2 @ get copro access"
74 : "=r" (val) : : "cc");
75 return val;
76 }
77
set_copro_access(unsigned int val)78 static inline void set_copro_access(unsigned int val)
79 {
80 asm volatile("mcr p15, 0, %0, c1, c0, 2 @ set copro access"
81 : : "r" (val) : "cc");
82 isb();
83 }
84
85 #endif
86
87 #endif
88