Searched refs:CCCR (Results 1 – 8 of 8) sorted by relevance
69 ldr r6, =CCCR72 ldr r7, =CCCR_SLEEP @ prepare CCCR sleep value112 ldr r6, =CCCR
70 cccr = CCCR; in pxa25x_get_clk_frequency_khz()100 return L_clk_mult[(CCCR >> 0) & 0x1f] * BASE_CLK; in clk_pxa25x_mem_getrate()
83 cccr_a = CCCR & (1 << 25); in pxa27x_get_clk_frequency_khz()125 cccr_a = CCCR & (1 << 25); in clk_pxa27x_mem_getrate()
358 CCCR = pxa_freq_settings[idx].cccr; in pxa_set_target()
29 (*) The CCCR.CC3 register is reserved within the kernel to act as an atomic modify abort flag.31 (*) In the exception prologues run on kernel->kernel entry, CCCR.CC3 is set to 0 (Undefined58 (1) The condition CCCR.CC3 is cleared unconditionally by an exception, irrespective of whether or
35 CPU-Core: fr405, gr0-31, BE, CCCR
102 CCCR.CC3 Cleared by exception prologue 132 CCR/CCCR - Mostly Clobbered
137 #define CCCR __REG(0x41300000) /* Core Clock Configuration Register */ macro