Searched refs:BIT_6 (Results 1 – 15 of 15) sorted by relevance
32 #define BIT_6 0x40 macro136 #define ISP_CFG1_F128 BIT_6 /* 128-byte FIFO threshold */974 #define OF_DATA_IN BIT_6 /* Data in to initiator */978 #define OF_NO_DATA (BIT_7 | BIT_6)
482 return BIT_6; in qla1280_data_direction()484 return BIT_5 | BIT_6; in qla1280_data_direction()1178 mr |= BIT_6; in qla1280_set_target_parameters()1946 if (!(status = qla1280_mailbox_command(ha, BIT_7 | BIT_6 | BIT_4 | in qla1280_init_rings()1960 status = qla1280_mailbox_command(ha, BIT_7 | BIT_6 | BIT_5 | in qla1280_init_rings()2229 cfg1 = RD_REG_WORD(®->cfg_1) & ~(BIT_4 | BIT_5 | BIT_6); in qla1280_nvram_config()2296 status |= qla1280_mailbox_command(ha, BIT_7 | BIT_6 | BIT_2 | in qla1280_nvram_config()3986 qla1280_mailbox_command(ha, BIT_6 | BIT_3 | BIT_2 | BIT_1 | BIT_0, in qla1280_get_target_parameters()
17 #define FO1_DISABLE_LED_CTRL BIT_635 #define PDF_ACK0_CAPABLE BIT_6748 #define LCF_EXPL_LOGO BIT_6 /* Perform an explicit LOGO. */963 #define HCCRX_HOST_INT BIT_6 /* Host to RISC interrupt bit. */
65 #define BIT_6 0x40 macro606 #define FO1_DISABLE_GPIO6_7 BIT_6 /* LED bits */623 #define ADD_FO1_DISABLE_GPIO_LED_CTRL BIT_6 /* LED bits */757 #define MBX_6 BIT_61271 #define CF_WRITE BIT_61444 #define RF_RQ_DMA_ERROR BIT_6 /* Request Queue DMA error. */2548 #define DT_ISP6322 BIT_6
1582 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4; in qla2x00_update_fw_options()1595 (BIT_7 | BIT_6 | BIT_5)) >> 5; in qla2x00_update_fw_options()1600 (BIT_7 | BIT_6 | BIT_5 | BIT_4)) >> 4; in qla2x00_update_fw_options()1719 if ((ha->fw_attributes & BIT_6) && (IS_MSIX_NACK_CAPABLE(ha)) && in qla24xx_config_rings()2265 nv->firmware_options[0] |= (BIT_6 | BIT_1); in qla2x00_nvram_config()2273 nv->firmware_options[0] &= ~BIT_6; in qla2x00_nvram_config()2292 if ((nv->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) == in qla2x00_nvram_config()2295 nv->add_firmware_options[0] &= ~(BIT_6 | BIT_5 | BIT_4); in qla2x00_nvram_config()2325 if ((icb->firmware_options[1] & BIT_6) == 0) { in qla2x00_nvram_config()2355 (icb->add_firmware_options[0] & (BIT_6 | BIT_5 | BIT_4)) >> 4; in qla2x00_nvram_config()[all …]
792 options |= BIT_6; in qla25xx_create_rsp_que()
1540 mcp->mb[1] = BIT_6; in qla2x00_lip_reset()3828 mcp->mb[1] = mreq->options | BIT_6; // BIT_6 specifies 64 bit addressing in qla2x00_loopback_test()3889 mcp->mb[1] = mreq->options | BIT_6; /* BIT_6 specifies 64bit address */ in qla2x00_echo_test()
387 if (!(ha->fw_attributes & BIT_6)) { in qla25xx_setup_mode()478 (BIT_4 | BIT_5 | BIT_6 | BIT_7 | BIT_8 | BIT_9)) >> 4; in qla24xx_pci_info_str()
1054 arg1 |= (BIT_4 | BIT_6 | BIT_7); in qlcnic_config_switch_port()1061 arg1 &= ~BIT_6; in qlcnic_config_switch_port()1120 esw_cfg->promisc_mode = !!(arg1 & BIT_6); in qlcnic_get_eswitch_port_config()
200 #define BIT_6 0x40 macro
1344 #define QLCNIC_DUMP_WRT_SAVED BIT_6
715 if (adapter->capabilities & BIT_6) in qlcnic_initialize_nic()
77 #define BIT_6 0x40 macro
1392 chap_table->flags |= BIT_6; /* peer */ in qla4xxx_set_chap()1467 if (chap_table->flags & BIT_6) in qla4xxx_get_chap_index()
400 if (chap_table->flags & BIT_6) /* peer */ in qla4xxx_get_chap_list()3941 if (!(chap_table->flags & BIT_6)) /* Not BIDI */ in qla4xxx_get_bidi_chap()