Home
last modified time | relevance | path

Searched refs:BAR1 (Results 1 – 7 of 7) sorted by relevance

/linux-3.4.99/sound/pci/lola/
Dlola.c242 status = lola_readl(chip, BAR1, DINTSTS); in lola_interrupt()
246 in_sts = lola_readl(chip, BAR1, DIINTSTS); in lola_interrupt()
247 out_sts = lola_readl(chip, BAR1, DOINTSTS); in lola_interrupt()
292 lola_writel(chip, BAR1, DINTSTS, in lola_interrupt()
316 lola_writel(chip, BAR1, BOARD_MODE, 0); in reset_controller()
342 lola_writel(chip, BAR1, DOINTCTL, val); in lola_irq_enable()
344 lola_writel(chip, BAR1, DIINTCTL, val); in lola_irq_enable()
349 lola_writel(chip, BAR1, DINTCTL, val); in lola_irq_enable()
354 lola_writel(chip, BAR1, DINTCTL, 0); in lola_irq_disable()
355 lola_writel(chip, BAR1, DIINTCTL, 0); in lola_irq_disable()
[all …]
Dlola.h387 #define BAR1 1 macro
404 readl((chip)->bar[BAR1].remap_addr + LOLA_BAR1_DSD0_OFFSET + \
407 writel((val), (chip)->bar[BAR1].remap_addr + LOLA_BAR1_DSD0_OFFSET + \
Dlola_proc.c185 readl(chip->bar[BAR1].remap_addr + i)); in lola_proc_regs_read()
190 readl(chip->bar[BAR1].remap_addr + i)); in lola_proc_regs_read()
Dlola_pcm.c49 return lola_readl(chip, BAR1, LRC); in lola_get_lrc()
Dlola_mixer.c134 (chip->bar[BAR1].remap_addr + LOLA_BAR1_SOURCE_GAIN_ENABLE); in lola_init_mixer_widget()
/linux-3.4.99/Documentation/scsi/
Dhptiop.txt40 For Marvell IOP based adapters, the IOP is accessed via PCI BAR0 and BAR1:
48 BAR1 offset Register
DChangeLog.lpfc550 * Added check to see if BAR1 register is valid before using BAR1