Searched refs:A_IMR_CPU1_BASE (Results 1 – 2 of 2) sorted by relevance
35 IOADDR(A_IMR_CPU1_BASE + R_IMR_MAILBOX_SET_CPU)40 IOADDR(A_IMR_CPU1_BASE + R_IMR_MAILBOX_CLR_CPU)45 IOADDR(A_IMR_CPU1_BASE + R_IMR_MAILBOX_CPU)
712 #define A_IMR_CPU1_BASE 0x0010022000 macro