1 /* 2 * Copyright (C) ST-Ericsson 2011 3 * 4 * License Terms: GNU General Public License v2 5 */ 6 #ifndef MFD_AB5500_H 7 #define MFD_AB5500_H 8 9 struct device; 10 11 enum ab5500_devid { 12 AB5500_DEVID_ADC, 13 AB5500_DEVID_LEDS, 14 AB5500_DEVID_POWER, 15 AB5500_DEVID_REGULATORS, 16 AB5500_DEVID_SIM, 17 AB5500_DEVID_RTC, 18 AB5500_DEVID_CHARGER, 19 AB5500_DEVID_FUELGAUGE, 20 AB5500_DEVID_VIBRATOR, 21 AB5500_DEVID_CODEC, 22 AB5500_DEVID_USB, 23 AB5500_DEVID_OTP, 24 AB5500_DEVID_VIDEO, 25 AB5500_DEVID_DBIECI, 26 AB5500_DEVID_ONSWA, 27 AB5500_NUM_DEVICES, 28 }; 29 30 enum ab5500_banks { 31 AB5500_BANK_VIT_IO_I2C_CLK_TST_OTP = 0, 32 AB5500_BANK_VDDDIG_IO_I2C_CLK_TST = 1, 33 AB5500_BANK_VDENC = 2, 34 AB5500_BANK_SIM_USBSIM = 3, 35 AB5500_BANK_LED = 4, 36 AB5500_BANK_ADC = 5, 37 AB5500_BANK_RTC = 6, 38 AB5500_BANK_STARTUP = 7, 39 AB5500_BANK_DBI_ECI = 8, 40 AB5500_BANK_CHG = 9, 41 AB5500_BANK_FG_BATTCOM_ACC = 10, 42 AB5500_BANK_USB = 11, 43 AB5500_BANK_IT = 12, 44 AB5500_BANK_VIBRA = 13, 45 AB5500_BANK_AUDIO_HEADSETUSB = 14, 46 AB5500_NUM_BANKS = 15, 47 }; 48 49 enum ab5500_banks_addr { 50 AB5500_ADDR_VIT_IO_I2C_CLK_TST_OTP = 0x4A, 51 AB5500_ADDR_VDDDIG_IO_I2C_CLK_TST = 0x4B, 52 AB5500_ADDR_VDENC = 0x06, 53 AB5500_ADDR_SIM_USBSIM = 0x04, 54 AB5500_ADDR_LED = 0x10, 55 AB5500_ADDR_ADC = 0x0A, 56 AB5500_ADDR_RTC = 0x0F, 57 AB5500_ADDR_STARTUP = 0x03, 58 AB5500_ADDR_DBI_ECI = 0x07, 59 AB5500_ADDR_CHG = 0x0B, 60 AB5500_ADDR_FG_BATTCOM_ACC = 0x0C, 61 AB5500_ADDR_USB = 0x05, 62 AB5500_ADDR_IT = 0x0E, 63 AB5500_ADDR_VIBRA = 0x02, 64 AB5500_ADDR_AUDIO_HEADSETUSB = 0x0D, 65 }; 66 67 /* 68 * Interrupt register offsets 69 * Bank : 0x0E 70 */ 71 #define AB5500_IT_SOURCE0_REG 0x20 72 #define AB5500_IT_SOURCE1_REG 0x21 73 #define AB5500_IT_SOURCE2_REG 0x22 74 #define AB5500_IT_SOURCE3_REG 0x23 75 #define AB5500_IT_SOURCE4_REG 0x24 76 #define AB5500_IT_SOURCE5_REG 0x25 77 #define AB5500_IT_SOURCE6_REG 0x26 78 #define AB5500_IT_SOURCE7_REG 0x27 79 #define AB5500_IT_SOURCE8_REG 0x28 80 #define AB5500_IT_SOURCE9_REG 0x29 81 #define AB5500_IT_SOURCE10_REG 0x2A 82 #define AB5500_IT_SOURCE11_REG 0x2B 83 #define AB5500_IT_SOURCE12_REG 0x2C 84 #define AB5500_IT_SOURCE13_REG 0x2D 85 #define AB5500_IT_SOURCE14_REG 0x2E 86 #define AB5500_IT_SOURCE15_REG 0x2F 87 #define AB5500_IT_SOURCE16_REG 0x30 88 #define AB5500_IT_SOURCE17_REG 0x31 89 #define AB5500_IT_SOURCE18_REG 0x32 90 #define AB5500_IT_SOURCE19_REG 0x33 91 #define AB5500_IT_SOURCE20_REG 0x34 92 #define AB5500_IT_SOURCE21_REG 0x35 93 #define AB5500_IT_SOURCE22_REG 0x36 94 #define AB5500_IT_SOURCE23_REG 0x37 95 96 #define AB5500_NUM_IRQ_REGS 23 97 98 /** 99 * struct ab5500 100 * @access_mutex: lock out concurrent accesses to the AB registers 101 * @dev: a pointer to the device struct for this chip driver 102 * @ab5500_irq: the analog baseband irq 103 * @irq_base: the platform configuration irq base for subdevices 104 * @chip_name: name of this chip variant 105 * @chip_id: 8 bit chip ID for this chip variant 106 * @irq_lock: a lock to protect the mask 107 * @abb_events: a local bit mask of the prcmu wakeup events 108 * @event_mask: a local copy of the mask event registers 109 * @last_event_mask: a copy of the last event_mask written to hardware 110 * @startup_events: a copy of the first reading of the event registers 111 * @startup_events_read: whether the first events have been read 112 */ 113 struct ab5500 { 114 struct mutex access_mutex; 115 struct device *dev; 116 unsigned int ab5500_irq; 117 unsigned int irq_base; 118 char chip_name[32]; 119 u8 chip_id; 120 struct mutex irq_lock; 121 u32 abb_events; 122 u8 mask[AB5500_NUM_IRQ_REGS]; 123 u8 oldmask[AB5500_NUM_IRQ_REGS]; 124 u8 startup_events[AB5500_NUM_IRQ_REGS]; 125 bool startup_events_read; 126 #ifdef CONFIG_DEBUG_FS 127 unsigned int debug_bank; 128 unsigned int debug_address; 129 #endif 130 }; 131 132 struct ab5500_platform_data { 133 struct {unsigned int base; unsigned int count; } irq; 134 void *dev_data[AB5500_NUM_DEVICES]; 135 struct abx500_init_settings *init_settings; 136 unsigned int init_settings_sz; 137 bool pm_power_off; 138 }; 139 140 #endif /* MFD_AB5500_H */ 141