| /linux-3.4.99/arch/mips/kernel/ |
| D | r4k_switch.S | 48 mfc0 t1, CP0_STATUS
49 LONG_S t1, THREAD_STATUS(a0)
58 li t1, _TIF_USEDFPU
59 and t2, t0, t1
61 nor t1, zero, t1
63 and t0, t0, t1
70 li t1, ~ST0_CU1
71 and t0, t0, t1
74 fpu_save_double a0 t0 t1 # c0_status passed in t0
75 # clobbers t1
[all …]
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| D | octeon_switch.S | 39 mfc0 t1, CP0_STATUS
40 LONG_S t1, THREAD_STATUS(a0)
50 li t1, ST0_CU2
51 xor t0, t1
56 or t0, t1
66 li t1, ST0_CU2
67 xor t0, t1
81 li t1, -32768 /* Base address of CVMSEG */
86 LONG_L t8, 0(t1) /* Load from CVMSEG */
88 LONG_L t9, LONGSIZE(t1)/* Load from CVMSEG */
[all …]
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| D | r2300_switch.S | 49 mfc0 t1, CP0_STATUS
50 sw t1, THREAD_STATUS(a0)
59 li t1, _TIF_USEDFPU
60 and t2, t0, t1
62 nor t1, zero, t1
64 and t0, t0, t1
71 li t1, ~ST0_CU1
72 and t0, t0, t1
85 addiu t1, $28, _THREAD_SIZE - 32
86 sw t1, kernelsp
[all …]
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| /linux-3.4.99/crypto/ |
| D | sha256_generic.c | 55 u32 a, b, c, d, e, f, g, h, t1, t2; in sha256_transform() local
72 t1 = h + e1(e) + Ch(e,f,g) + 0x428a2f98 + W[ 0]; in sha256_transform()
73 t2 = e0(a) + Maj(a,b,c); d+=t1; h=t1+t2; in sha256_transform()
74 t1 = g + e1(d) + Ch(d,e,f) + 0x71374491 + W[ 1]; in sha256_transform()
75 t2 = e0(h) + Maj(h,a,b); c+=t1; g=t1+t2; in sha256_transform()
76 t1 = f + e1(c) + Ch(c,d,e) + 0xb5c0fbcf + W[ 2]; in sha256_transform()
77 t2 = e0(g) + Maj(g,h,a); b+=t1; f=t1+t2; in sha256_transform()
78 t1 = e + e1(b) + Ch(b,c,d) + 0xe9b5dba5 + W[ 3]; in sha256_transform()
79 t2 = e0(f) + Maj(f,g,h); a+=t1; e=t1+t2; in sha256_transform()
80 t1 = d + e1(a) + Ch(a,b,c) + 0x3956c25b + W[ 4]; in sha256_transform()
[all …]
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| D | seed.c | 317 t1 = X4 ^ ks[rbase+1]; \
318 t1 ^= t0; \
319 t1 = SS0[byte(t1, 0)] ^ SS1[byte(t1, 1)] ^ \
320 SS2[byte(t1, 2)] ^ SS3[byte(t1, 3)]; \
321 t0 += t1; \
324 t1 += t0; \
325 t1 = SS0[byte(t1, 0)] ^ SS1[byte(t1, 1)] ^ \
326 SS2[byte(t1, 2)] ^ SS3[byte(t1, 3)]; \
327 t0 += t1; \
329 X2 ^= t1;
[all …]
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| D | sha512_generic.c | 82 u64 a, b, c, d, e, f, g, h, t1, t2; in sha512_transform() local
107 t1 = h + e1(e) + Ch(e,f,g) + sha512_K[i ] + W[(i & 15)]; in sha512_transform()
108 t2 = e0(a) + Maj(a,b,c); d+=t1; h=t1+t2; in sha512_transform()
109 t1 = g + e1(d) + Ch(d,e,f) + sha512_K[i+1] + W[(i & 15) + 1]; in sha512_transform()
110 t2 = e0(h) + Maj(h,a,b); c+=t1; g=t1+t2; in sha512_transform()
111 t1 = f + e1(c) + Ch(c,d,e) + sha512_K[i+2] + W[(i & 15) + 2]; in sha512_transform()
112 t2 = e0(g) + Maj(g,h,a); b+=t1; f=t1+t2; in sha512_transform()
113 t1 = e + e1(b) + Ch(b,c,d) + sha512_K[i+3] + W[(i & 15) + 3]; in sha512_transform()
114 t2 = e0(f) + Maj(f,g,h); a+=t1; e=t1+t2; in sha512_transform()
115 t1 = d + e1(a) + Ch(a,b,c) + sha512_K[i+4] + W[(i & 15) + 4]; in sha512_transform()
[all …]
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| /linux-3.4.99/arch/mips/netlogic/common/ |
| D | smpboot.S | 59 mfcr t1, t0
62 or t1, t1, t2
64 and t1, t1, t2
65 mtcr t1, t0
68 lui t1, 0x0100 /* Experimental: Disable BRU accepting ALU ops */
69 mtcr t1, t0
104 mfc0 t1, CP0_EBASE, 1
105 srl t1, 5
106 andi t1, 0x3 /* t1 <- node */
108 mul t3, t2, t1 /* t3 = node * 0x40000 */
[all …]
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| /linux-3.4.99/arch/alpha/lib/ |
| D | stxcpy.S | 48 mskqh t1, a1, t3 # e0 :
49 ornot t1, t2, t2 # .. e1 :
52 or t0, t3, t1 # e0 :
60 stq_u t1, 0(a0) # e0 :
62 ldq_u t1, 0(a1) # e0 :
64 cmpbge zero, t1, t8 # e0 (stall)
84 zapnot t1, t6, t1 # e0 : clear src bytes >= null
87 or t0, t1, t1 # e1 :
89 1: stq_u t1, 0(a0) # e0 :
108 ldq_u t1, 0(a1) # e0 : load first src word
[all …]
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| D | ev6-stxcpy.S | 59 mskqh t1, a1, t3 # U :
60 ornot t1, t2, t2 # E : (stall)
64 or t0, t3, t1 # E : (stall)
73 stq_u t1, 0(a0) # L :
78 ldq_u t1, 0(a1) # L : Latency=3
80 cmpbge zero, t1, t8 # E : (3 cycle stall)
99 zapnot t1, t6, t1 # U : clear src bytes >= null (stall)
103 or t0, t1, t1 # E : (stall)
107 1: stq_u t1, 0(a0) # L :
128 ldq_u t1, 0(a1) # L : load first src word
[all …]
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| D | strlen_user.S | 48 lda t1, -1(zero)
49 insqh t1, a0, t1
51 or t1, t0, t0
53 cmpbge zero, t0, t1 # t1 <- bitmask: bit i == 1 <==> i-th byte == 0
56 bne t1, $found
66 cmpbge zero, t0, t1
67 beq t1, $loop
69 $found: negq t1, t2 # clear all but least set bit
70 and t1, t2, t1
72 and t1, 0xf0, t2 # binary search for that set bit
[all …]
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| D | strncpy_from_user.S | 45 mskqh t1, a1, t3 # e0 :
46 ornot t1, t2, t2 # .. e1 :
84 ldq_u t1, 0(a0) # e0 :
89 zap t1, t8, t1 # .. e1 : clear dst bytes <= null
90 or t0, t1, t0 # e1 :
107 xor a0, a1, t1 # e0 :
109 and t1, 7, t1 # e0 :
116 bne t1, $unaligned # .. e1 :
120 EX( ldq_u t1, 0(a1) ) # e0 : load first src word
147 or t1, t4, t1 # e1 : first aligned src word complete
[all …]
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| D | stxncpy.S | 56 mskqh t1, a1, t3 # e0 :
57 ornot t1, t2, t2 # .. e1 :
95 ldq_u t1, 0(a0) # e0 :
100 zap t1, t8, t1 # .. e1 : clear dst bytes <= null
101 or t0, t1, t0 # e1 :
121 xor a0, a1, t1 # e0 :
123 and t1, 7, t1 # e0 :
130 bne t1, $unaligned # .. e1 :
134 ldq_u t1, 0(a1) # e0 : load first src word
161 or t1, t4, t1 # e1 : first aligned src word complete
[all …]
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| D | ev6-stxncpy.S | 67 mskqh t1, a1, t3 # U :
68 ornot t1, t2, t2 # E : (stall)
121 ldq_u t1, 0(a0) # L :
126 zap t1, t8, t1 # .. e1 : clear dst bytes <= null
127 or t0, t1, t0 # e1 : (stall)
153 xor a0, a1, t1 # E :
155 and t1, 7, t1 # E : (stall)
164 bne t1, $unaligned # U :
166 ldq_u t1, 0(a1) # L : load first src word
201 or t1, t4, t1 # E : first aligned src word complete (stall)
[all …]
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| D | strrchr.S | 32 cmpbge zero, t0, t1 # .. e1 : bits set iff byte == zero
38 andnot t1, t4, t1 # .. e1 : clear garbage from null test
40 bne t1, $eos # .. e1 : did we already hit the terminator?
49 cmpbge zero, t0, t1 # .. e1 : bits set iff byte == zero
51 beq t1, $loop # .. e1 : if we havnt seen a null, loop
55 negq t1, t4 # e0 : isolate first null byte match
56 and t1, t4, t4 # e1 :
73 and t8, 0xcc, t1 # .. e1 :
74 cmovne t1, t1, t8 # e0 :
75 cmovne t1, 2, t1 # .. e1 :
[all …]
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| D | ev6-strncpy_from_user.S | 59 EX( ldq_u t1, 0(a1) ) # L : Latency=3 load first quadword
85 mskqh t1, a1, t3 # U :
87 ornot t1, t2, t2 # E :
140 ldq_u t1, 0(a0) # L :
145 zap t1, t8, t1 # U : clear dst bytes <= null
146 or t0, t1, t0 # E :
182 or t1, t4, t1 # E : first aligned src word complete
183 mskqh t1, a0, t1 # U : mask leading garbage in src
184 or t0, t1, t0 # E : first output word complete
205 extql t2, a1, t1 # U : position hi-bits of lo word
[all …]
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| /linux-3.4.99/lib/mpi/ |
| D | mpi-inv.c | 36 MPI t1 = NULL, t2 = NULL, t3 = NULL; in mpi_invm() local
77 t1 = mpi_alloc_set_ui(0); in mpi_invm()
78 if (!t1) in mpi_invm()
91 t1 = mpi_alloc_set_ui(1); in mpi_invm()
92 if (!t1) in mpi_invm()
105 if (mpi_test_bit(t1, 0) || mpi_test_bit(t2, 0)) { /* one is odd */ in mpi_invm()
106 if (mpi_add(t1, t1, v) < 0) in mpi_invm()
111 if (mpi_rshift(t1, t1, 1) < 0) in mpi_invm()
118 if (mpi_test_bit(t1, 0)) in mpi_invm()
119 if (mpi_add(t1, t1, v) < 0) in mpi_invm()
[all …]
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| /linux-3.4.99/arch/mips/include/asm/mach-pnx8550/ |
| D | kernel-entry-init.h | 128 srl t1, t3, 19 /* C0_CONFIGPR_IL_SHIFT */
129 andi t1, t1, 0x7 /* C0_CONFIGPR_IL_MASK */
130 beq t1, zero, pr4450_instr_cache_invalidated /* if zero instruction cache is absent */
132 addiu t0, t1, 1
133 ori t1, zero, 1
134 sllv t1, t1, t0
156 addu t0, t0, t1 /* add bytes in a line */
166 move t1, zero
179 cache Index_Store_Tag_D, 0(t1)
182 addiu t1, t1, 32 /* 32 bytes in a line */
[all …]
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| /linux-3.4.99/arch/mips/include/asm/sibyte/ |
| D | board.h | 42 #define setleds(t0, t1, c0, c1, c2, c3) \
44 li t1, c0; \
45 sb t1, 0x18(t0); \
46 li t1, c1; \
47 sb t1, 0x10(t0); \
48 li t1, c2; \
49 sb t1, 0x08(t0); \
50 li t1, c3; \
51 sb t1, 0x00(t0)
53 #define setleds(t0, t1, c0, c1, c2, c3)
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| /linux-3.4.99/arch/mips/dec/ |
| D | int-handler.S | 132 mfc0 t1,CP0_STATUS
137 and t0,t1 # isolate allowed ones
149 PTR_LA t1,cpu_mask_nr_tbl
150 1: lw t2,(t1)
154 addu t1,2*PTRSIZE # delay slot
159 lw a0,(-PTRSIZE)(t1)
178 andi t1,t0,KN02_IRQ_ALL
188 lw t1,IO_REG_SIMR(t2) # get mask: IOASIC simr
191 1: and t0,t1 # mask out allowed ones
198 PTR_LA t1,asic_mask_nr_tbl
[all …]
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| /linux-3.4.99/include/net/netfilter/ |
| D | nf_conntrack_tuple.h | 123 static inline bool __nf_ct_tuple_src_equal(const struct nf_conntrack_tuple *t1, in __nf_ct_tuple_src_equal() argument
126 return (nf_inet_addr_cmp(&t1->src.u3, &t2->src.u3) && in __nf_ct_tuple_src_equal()
127 t1->src.u.all == t2->src.u.all && in __nf_ct_tuple_src_equal()
128 t1->src.l3num == t2->src.l3num); in __nf_ct_tuple_src_equal()
131 static inline bool __nf_ct_tuple_dst_equal(const struct nf_conntrack_tuple *t1, in __nf_ct_tuple_dst_equal() argument
134 return (nf_inet_addr_cmp(&t1->dst.u3, &t2->dst.u3) && in __nf_ct_tuple_dst_equal()
135 t1->dst.u.all == t2->dst.u.all && in __nf_ct_tuple_dst_equal()
136 t1->dst.protonum == t2->dst.protonum); in __nf_ct_tuple_dst_equal()
139 static inline bool nf_ct_tuple_equal(const struct nf_conntrack_tuple *t1, in nf_ct_tuple_equal() argument
142 return __nf_ct_tuple_src_equal(t1, t2) && in nf_ct_tuple_equal()
[all …]
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| /linux-3.4.99/arch/mips/lib/ |
| D | memset.S | 63 LONG_SLL t1, a1, 8
64 or a1, t1
65 LONG_SLL t1, a1, 16
67 or a1, t1
68 LONG_SLL t1, a1, 32
70 or a1, t1
99 1: ori t1, a2, 0x3f /* # of full blocks */
100 xori t1, 0x3f
101 beqz t1, .Lmemset_partial /* no block to fill */
104 PTR_ADDU t1, a0 /* end address */
[all …]
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| D | csum_partial.S | 24 #undef t1
28 #define t1 $9 macro
155 lw t1, 0x04(src)
158 ADDC(sum, t1)
169 ld t1, 0x08(src)
171 ADDC(sum, t1)
173 CSUM_BIGCHUNK1(src, 0x00, sum, t0, t1, t3, t4)
184 CSUM_BIGCHUNK(src, 0x00, sum, t0, t1, t3, t4)
185 CSUM_BIGCHUNK(src, 0x20, sum, t0, t1, t3, t4)
186 CSUM_BIGCHUNK(src, 0x40, sum, t0, t1, t3, t4)
[all …]
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| /linux-3.4.99/arch/alpha/include/asm/ |
| D | swab.h | 26 __u64 t0, t1, t2, t3; in __arch_swab32() local
29 t1 = __kernel_inswl(x, 3); /* t1 : 000000CCDD000000 */ in __arch_swab32()
30 t1 |= t0; /* t1 : 000000CCDDAABBCC */ in __arch_swab32()
31 t2 = t1 >> 16; /* t2 : 0000000000CCDDAA */ in __arch_swab32()
32 t0 = t1 & 0xFF00FF00; /* t0 : 00000000DD00BB00 */ in __arch_swab32()
34 t1 = t0 + t3; /* t1 : ssssssssDDCCBBAA */ in __arch_swab32()
36 return t1; in __arch_swab32()
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| /linux-3.4.99/arch/parisc/lib/ |
| D | fixup.S | 28 .macro get_fault_ip t1 t2
30 LDREG RT%__per_cpu_offset(%r1),\t1
38 LDREGX \t2(\t1),\t2
40 LDREG RT%exception_data(%r1),\t1
42 add,l \t1,\t2,\t1
44 LDREG EXCDATA_IP(\t1), \t1
47 .macro get_fault_ip t1 t2
52 LDREG EXCDATA_IP(\t2), \t1
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| /linux-3.4.99/arch/mips/alchemy/common/ |
| D | sleeper.S | 59 la t1, __flush_cache_all
60 lw t0, 0(t1)
139 2: lw t1, 0x0850(a0) /* mem_sdstat */
140 and t2, t1, t0
147 lw t1, 0x0840(a0) /* mem_sdconfiga */
148 and t1, t0, t1 /* clear CE[1:0] */
149 sw t1, 0x0840(a0) /* mem_sdconfiga */
163 la t1, 4f
164 subu t2, t1, t0
199 li t1, (1 << 7 | 0x3F)
[all …]
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