Searched refs:ul_shm_base (Results 1 – 2 of 2) sorted by relevance
274 u32 ul_shm_base; in bridge_io_on_loaded() local338 &ul_shm_base); in bridge_io_on_loaded()349 if (ul_shm_limit <= ul_shm_base) { in bridge_io_on_loaded()354 ul_shm_length = (ul_shm_limit - ul_shm_base + 1) * hio_mgr->word_size; in bridge_io_on_loaded()671 if (ae_proc[0].dsp_va > ul_shm_base) { in bridge_io_on_loaded()676 ul_shm_base_offset = (ul_shm_base - ae_proc[0].dsp_va) * in bridge_io_on_loaded()691 ul_shm_base = hio_mgr->ext_proc_info.ty_tlb[0].gpp_phys; in bridge_io_on_loaded()692 ul_shm_base += ul_shm_base_offset; in bridge_io_on_loaded()693 ul_shm_base = (u32) MEM_LINEAR_ADDRESS((void *)ul_shm_base, in bridge_io_on_loaded()695 if (ul_shm_base == 0) { in bridge_io_on_loaded()[all …]
377 u32 ul_shm_base; /* Gpp Phys SM base addr(byte) */ in bridge_brd_start() local409 ul_shm_base = dev_context->atlb_entry[0].gpp_va + ul_shm_offset_virt; in bridge_brd_start()411 DBC_ASSERT(ul_shm_base != 0); in bridge_brd_start()413 dw_sync_addr = ul_shm_base + SHMSYNCOFFSET; in bridge_brd_start()416 if ((ul_shm_base_virt == 0) || (ul_shm_base == 0)) { in bridge_brd_start()607 dsp_wdt_sm_set((void *)ul_shm_base); in bridge_brd_start()