1 #ifndef __INTEL_SST_FW_IPC_H__ 2 #define __INTEL_SST_FW_IPC_H__ 3 /* 4 * intel_sst_fw_ipc.h - Intel SST Driver for audio engine 5 * 6 * Copyright (C) 2008-10 Intel Corporation 7 * Author: Vinod Koul <vinod.koul@intel.com> 8 * Harsha Priya <priya.harsha@intel.com> 9 * Dharageswari R <dharageswari.r@intel.com> 10 * KP Jeeja <jeeja.kp@intel.com> 11 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 12 * 13 * This program is free software; you can redistribute it and/or modify 14 * it under the terms of the GNU General Public License as published by 15 * the Free Software Foundation; version 2 of the License. 16 * 17 * This program is distributed in the hope that it will be useful, but 18 * WITHOUT ANY WARRANTY; without even the implied warranty of 19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU 20 * General Public License for more details. 21 * 22 * You should have received a copy of the GNU General Public License along 23 * with this program; if not, write to the Free Software Foundation, Inc., 24 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA. 25 * 26 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 27 * 28 * This driver exposes the audio engine functionalities to the ALSA 29 * and middleware. 30 * This file has definitions shared between the firmware and driver 31 */ 32 33 #define MAX_NUM_STREAMS_MRST 3 34 #define MAX_NUM_STREAMS_MFLD 6 35 #define MAX_NUM_STREAMS 6 36 #define MAX_DBG_RW_BYTES 80 37 #define MAX_NUM_SCATTER_BUFFERS 8 38 #define MAX_LOOP_BACK_DWORDS 8 39 /* IPC base address and mailbox, timestamp offsets */ 40 #define SST_MAILBOX_SIZE 0x0400 41 #define SST_MAILBOX_SEND 0x0000 42 #define SST_MAILBOX_RCV 0x0804 43 #define SST_TIME_STAMP 0x1800 44 #define SST_RESERVED_OFFSET 0x1A00 45 #define SST_CHEKPOINT_OFFSET 0x1C00 46 #define REPLY_MSG 0x80 47 48 /* Message ID's for IPC messages */ 49 /* Bits B7: SST or IA/SC ; B6-B4: Msg Category; B3-B0: Msg Type */ 50 51 /* I2L Firmware/Codec Download msgs */ 52 #define IPC_IA_PREP_LIB_DNLD 0x01 53 #define IPC_IA_LIB_DNLD_CMPLT 0x02 54 55 #define IPC_IA_SET_PMIC_TYPE 0x03 56 #define IPC_IA_GET_FW_VERSION 0x04 57 #define IPC_IA_GET_FW_BUILD_INF 0x05 58 #define IPC_IA_GET_FW_INFO 0x06 59 60 /* I2L Codec Config/control msgs */ 61 #define IPC_IA_SET_CODEC_PARAMS 0x10 62 #define IPC_IA_GET_CODEC_PARAMS 0x11 63 #define IPC_IA_SET_PPP_PARAMS 0x12 64 #define IPC_IA_GET_PPP_PARAMS 0x13 65 #define IPC_IA_PLAY_FRAMES 0x14 66 #define IPC_IA_CAPT_FRAMES 0x15 67 #define IPC_IA_PLAY_VOICE 0x16 68 #define IPC_IA_CAPT_VOICE 0x17 69 #define IPC_IA_DECODE_FRAMES 0x18 70 71 #define IPC_IA_ALG_PARAMS 0x1A 72 73 /* I2L Stream config/control msgs */ 74 #define IPC_IA_ALLOC_STREAM 0x20 /* Allocate a stream ID */ 75 #define IPC_IA_FREE_STREAM 0x21 /* Free the stream ID */ 76 #define IPC_IA_SET_STREAM_PARAMS 0x22 77 #define IPC_IA_GET_STREAM_PARAMS 0x23 78 #define IPC_IA_PAUSE_STREAM 0x24 79 #define IPC_IA_RESUME_STREAM 0x25 80 #define IPC_IA_DROP_STREAM 0x26 81 #define IPC_IA_DRAIN_STREAM 0x27 /* Short msg with str_id */ 82 #define IPC_IA_TARGET_DEV_SELECT 0x28 83 #define IPC_IA_CONTROL_ROUTING 0x29 84 85 #define IPC_IA_SET_STREAM_VOL 0x2A /*Vol for stream, pre mixer */ 86 #define IPC_IA_GET_STREAM_VOL 0x2B 87 #define IPC_IA_SET_STREAM_MUTE 0x2C 88 #define IPC_IA_GET_STREAM_MUTE 0x2D 89 #define IPC_IA_ENABLE_RX_TIME_SLOT 0x2E /* Enable Rx time slot 0 or 1 */ 90 91 #define IPC_IA_START_STREAM 0x30 /* Short msg with str_id */ 92 93 /* Debug msgs */ 94 #define IPC_IA_DBG_MEM_READ 0x40 95 #define IPC_IA_DBG_MEM_WRITE 0x41 96 #define IPC_IA_DBG_LOOP_BACK 0x42 97 98 /* L2I Firmware/Codec Download msgs */ 99 #define IPC_IA_FW_INIT_CMPLT 0x81 100 #define IPC_IA_LPE_GETTING_STALLED 0x82 101 #define IPC_IA_LPE_UNSTALLED 0x83 102 103 /* L2I Codec Config/control msgs */ 104 #define IPC_SST_GET_PLAY_FRAMES 0x90 /* Request IA more data */ 105 #define IPC_SST_GET_CAPT_FRAMES 0x91 /* Request IA more data */ 106 #define IPC_SST_BUF_UNDER_RUN 0x92 /* PB Under run and stopped */ 107 #define IPC_SST_BUF_OVER_RUN 0x93 /* CAP Under run and stopped */ 108 #define IPC_SST_DRAIN_END 0x94 /* PB Drain complete and stopped */ 109 #define IPC_SST_CHNGE_SSP_PARAMS 0x95 /* PB SSP parameters changed */ 110 #define IPC_SST_STREAM_PROCESS_FATAL_ERR 0x96/* error in processing a stream */ 111 #define IPC_SST_PERIOD_ELAPSED 0x97 /* period elapsed */ 112 #define IPC_IA_TARGET_DEV_CHNGD 0x98 /* error in processing a stream */ 113 114 #define IPC_SST_ERROR_EVENT 0x99 /* Buffer over run occurred */ 115 /* L2S messages */ 116 #define IPC_SC_DDR_LINK_UP 0xC0 117 #define IPC_SC_DDR_LINK_DOWN 0xC1 118 #define IPC_SC_SET_LPECLK_REQ 0xC2 119 #define IPC_SC_SSP_BIT_BANG 0xC3 120 121 /* L2I Error reporting msgs */ 122 #define IPC_IA_MEM_ALLOC_FAIL 0xE0 123 #define IPC_IA_PROC_ERR 0xE1 /* error in processing a 124 stream can be used by playback and 125 capture modules */ 126 127 /* L2I Debug msgs */ 128 #define IPC_IA_PRINT_STRING 0xF0 129 130 131 132 /* Command Response or Acknowledge message to any IPC message will have 133 * same message ID and stream ID information which is sent. 134 * There is no specific Ack message ID. The data field is used as response 135 * meaning. 136 */ 137 enum ackData { 138 IPC_ACK_SUCCESS = 0, 139 IPC_ACK_FAILURE 140 }; 141 142 143 enum sst_error_codes { 144 /* Error code,response to msgId: Description */ 145 /* Common error codes */ 146 SST_SUCCESS = 0, /* Success */ 147 SST_ERR_INVALID_STREAM_ID = 1, 148 SST_ERR_INVALID_MSG_ID = 2, 149 SST_ERR_INVALID_STREAM_OP = 3, 150 SST_ERR_INVALID_PARAMS = 4, 151 SST_ERR_INVALID_CODEC = 5, 152 SST_ERR_INVALID_MEDIA_TYPE = 6, 153 SST_ERR_STREAM_ERR = 7, 154 155 /* IPC specific error codes */ 156 SST_IPC_ERR_CALL_BACK_NOT_REGD = 8, 157 SST_IPC_ERR_STREAM_NOT_ALLOCATED = 9, 158 SST_IPC_ERR_STREAM_ALLOC_FAILED = 10, 159 SST_IPC_ERR_GET_STREAM_FAILED = 11, 160 SST_ERR_MOD_NOT_AVAIL = 12, 161 SST_ERR_MOD_DNLD_RQD = 13, 162 SST_ERR_STREAM_STOPPED = 14, 163 SST_ERR_STREAM_IN_USE = 15, 164 165 /* Capture specific error codes */ 166 SST_CAP_ERR_INCMPLTE_CAPTURE_MSG = 16, 167 SST_CAP_ERR_CAPTURE_FAIL = 17, 168 SST_CAP_ERR_GET_DDR_NEW_SGLIST = 18, 169 SST_CAP_ERR_UNDER_RUN = 19, 170 SST_CAP_ERR_OVERFLOW = 20, 171 172 /* Playback specific error codes*/ 173 SST_PB_ERR_INCMPLTE_PLAY_MSG = 21, 174 SST_PB_ERR_PLAY_FAIL = 22, 175 SST_PB_ERR_GET_DDR_NEW_SGLIST = 23, 176 177 /* Codec manager specific error codes */ 178 SST_LIB_ERR_LIB_DNLD_REQUIRED = 24, 179 SST_LIB_ERR_LIB_NOT_SUPPORTED = 25, 180 181 /* Library manager specific error codes */ 182 SST_SCC_ERR_PREP_DNLD_FAILED = 26, 183 SST_SCC_ERR_LIB_DNLD_RES_FAILED = 27, 184 /* Scheduler specific error codes */ 185 SST_SCH_ERR_FAIL = 28, 186 187 /* DMA specific error codes */ 188 SST_DMA_ERR_NO_CHNL_AVAILABLE = 29, 189 SST_DMA_ERR_INVALID_INPUT_PARAMS = 30, 190 SST_DMA_ERR_CHNL_ALREADY_SUSPENDED = 31, 191 SST_DMA_ERR_CHNL_ALREADY_STARTED = 32, 192 SST_DMA_ERR_CHNL_NOT_ENABLED = 33, 193 SST_DMA_ERR_TRANSFER_FAILED = 34, 194 195 SST_SSP_ERR_ALREADY_ENABLED = 35, 196 SST_SSP_ERR_ALREADY_DISABLED = 36, 197 SST_SSP_ERR_NOT_INITIALIZED = 37, 198 SST_SSP_ERR_SRAM_NO_DMA_DATA = 38, 199 200 /* Other error codes */ 201 SST_ERR_MOD_INIT_FAIL = 39, 202 203 /* FW init error codes */ 204 SST_RDR_ERR_IO_DEV_SEL_NOT_ALLOWED = 40, 205 SST_RDR_ERR_ROUTE_ALREADY_STARTED = 41, 206 SST_RDR_ERR_IO_DEV_SEL_FAILED = 42, 207 SST_RDR_PREP_CODEC_DNLD_FAILED = 43, 208 209 /* Memory debug error codes */ 210 SST_ERR_DBG_MEM_READ_FAIL = 44, 211 SST_ERR_DBG_MEM_WRITE_FAIL = 45, 212 SST_ERR_INSUFFICIENT_INPUT_SG_LIST = 46, 213 SST_ERR_INSUFFICIENT_OUTPUT_SG_LIST = 47, 214 215 SST_ERR_BUFFER_NOT_AVAILABLE = 48, 216 SST_ERR_BUFFER_NOT_ALLOCATED = 49, 217 SST_ERR_INVALID_REGION_TYPE = 50, 218 SST_ERR_NULL_PTR = 51, 219 SST_ERR_INVALID_BUFFER_SIZE = 52, 220 SST_ERR_INVALID_BUFFER_INDEX = 53, 221 222 /*IIPC specific error codes */ 223 SST_IIPC_QUEUE_FULL = 54, 224 SST_IIPC_ERR_MSG_SND_FAILED = 55, 225 SST_PB_ERR_UNDERRUN_OCCURED = 56, 226 SST_RDR_INSUFFICIENT_MIXER_BUFFER = 57, 227 SST_INVALID_TIME_SLOTS = 58, 228 }; 229 230 enum dbg_mem_data_type { 231 /* Data type of debug read/write */ 232 DATA_TYPE_U32, 233 DATA_TYPE_U16, 234 DATA_TYPE_U8, 235 }; 236 237 /* CAUTION NOTE: All IPC message body must be multiple of 32 bits.*/ 238 239 /* IPC Header */ 240 union ipc_header { 241 struct { 242 u32 msg_id:8; /* Message ID - Max 256 Message Types */ 243 u32 str_id:5; 244 u32 large:1; /* Large Message if large = 1 */ 245 u32 reserved:2; /* Reserved for future use */ 246 u32 data:14; /* Ack/Info for msg, size of msg in Mailbox */ 247 u32 done:1; /* bit 30 */ 248 u32 busy:1; /* bit 31 */ 249 } part; 250 u32 full; 251 } __attribute__ ((packed)); 252 253 /* Firmware build info */ 254 struct sst_fw_build_info { 255 unsigned char date[16]; /* Firmware build date */ 256 unsigned char time[16]; /* Firmware build time */ 257 } __attribute__ ((packed)); 258 259 struct ipc_header_fw_init { 260 struct snd_sst_fw_version fw_version;/* Firmware version details */ 261 struct sst_fw_build_info build_info; 262 u16 result; /* Fw init result */ 263 u8 module_id; /* Module ID in case of error */ 264 u8 debug_info; /* Debug info from Module ID in case of fail */ 265 } __attribute__ ((packed)); 266 267 /* Address and size info of a frame buffer in DDR */ 268 struct sst_address_info { 269 u32 addr; /* Address at IA */ 270 u32 size; /* Size of the buffer */ 271 } __attribute__ ((packed)); 272 273 /* Time stamp */ 274 struct snd_sst_tstamp { 275 u64 samples_processed;/* capture - data in DDR */ 276 u64 samples_rendered;/* playback - data rendered */ 277 u64 bytes_processed;/* bytes decoded or encoded */ 278 u32 sampling_frequency;/* eg: 48000, 44100 */ 279 u32 dma_base_address;/* DMA base address */ 280 u16 dma_channel_no;/* DMA Channel used for the data transfer*/ 281 u16 reserved;/* 32 bit alignment */ 282 }; 283 284 /* Frame info to play or capture */ 285 struct sst_frame_info { 286 u16 num_entries; /* number of entries to follow */ 287 u16 rsrvd; 288 struct sst_address_info addr[MAX_NUM_SCATTER_BUFFERS]; 289 } __attribute__ ((packed)); 290 291 /* Frames info for decode */ 292 struct snd_sst_decode_info { 293 unsigned long long input_bytes_consumed; 294 unsigned long long output_bytes_produced; 295 struct sst_frame_info frames_in; 296 struct sst_frame_info frames_out; 297 } __attribute__ ((packed)); 298 299 /* SST to IA print debug message*/ 300 struct ipc_sst_ia_print_params { 301 u32 string_size;/* Max value is 160 */ 302 u8 prt_string[160];/* Null terminated Char string */ 303 } __attribute__ ((packed)); 304 305 /* Voice data message */ 306 struct snd_sst_voice_data { 307 u16 num_bytes;/* Number of valid voice data bytes */ 308 u8 pcm_wd_size;/* 0=8 bit, 1=16 bit 2=32 bit */ 309 u8 reserved;/* Reserved */ 310 u8 voice_data_buf[0];/* Voice data buffer in bytes, little endian */ 311 } __attribute__ ((packed)); 312 313 /* SST to IA memory read debug message */ 314 struct ipc_sst_ia_dbg_mem_rw { 315 u16 num_bytes;/* Maximum of MAX_DBG_RW_BYTES */ 316 u16 data_type;/* enum: dbg_mem_data_type */ 317 u32 address; /* Memory address of data memory of data_type */ 318 u8 rw_bytes[MAX_DBG_RW_BYTES];/* Maximum of 64 bytes can be RW */ 319 } __attribute__ ((packed)); 320 321 struct ipc_sst_ia_dbg_loop_back { 322 u16 num_dwords; /* Maximum of MAX_DBG_RW_BYTES */ 323 u16 increment_val;/* Increments dwords by this value, 0- no increment */ 324 u32 lpbk_dwords[MAX_LOOP_BACK_DWORDS];/* Maximum of 8 dwords loopback */ 325 } __attribute__ ((packed)); 326 327 /* Stream type params struture for Alloc stream */ 328 struct snd_sst_str_type { 329 u8 codec_type; /* Codec type */ 330 u8 str_type; /* 1 = voice 2 = music */ 331 u8 operation; /* Playback or Capture */ 332 u8 protected_str; /* 0=Non DRM, 1=DRM */ 333 u8 time_slots; 334 u8 reserved; /* Reserved */ 335 u16 result; /* Result used for acknowledgment */ 336 } __attribute__ ((packed)); 337 338 /* Library info structure */ 339 struct module_info { 340 u32 lib_version; 341 u32 lib_type;/*TBD- KLOCKWORK u8 lib_type;*/ 342 u32 media_type; 343 u8 lib_name[12]; 344 u32 lib_caps; 345 unsigned char b_date[16]; /* Lib build date */ 346 unsigned char b_time[16]; /* Lib build time */ 347 } __attribute__ ((packed)); 348 349 /* Library slot info */ 350 struct lib_slot_info { 351 u8 slot_num; /* 1 or 2 */ 352 u8 reserved1; 353 u16 reserved2; 354 u32 iram_size; /* slot size in IRAM */ 355 u32 dram_size; /* slot size in DRAM */ 356 u32 iram_offset; /* starting offset of slot in IRAM */ 357 u32 dram_offset; /* starting offset of slot in DRAM */ 358 } __attribute__ ((packed)); 359 360 struct snd_sst_lib_download { 361 struct module_info lib_info; /* library info type, capabilities etc */ 362 struct lib_slot_info slot_info; /* slot info to be downloaded */ 363 u32 mod_entry_pt; 364 }; 365 366 struct snd_sst_lib_download_info { 367 struct snd_sst_lib_download dload_lib; 368 u16 result; /* Result used for acknowledgment */ 369 u8 pvt_id; /* Private ID */ 370 u8 reserved; /* for alignment */ 371 }; 372 373 /* Alloc stream params structure */ 374 struct snd_sst_alloc_params { 375 struct snd_sst_str_type str_type; 376 struct snd_sst_stream_params stream_params; 377 }; 378 379 struct snd_sst_fw_get_stream_params { 380 struct snd_sst_stream_params codec_params; 381 struct snd_sst_pmic_config pcm_params; 382 }; 383 384 /* Alloc stream response message */ 385 struct snd_sst_alloc_response { 386 struct snd_sst_str_type str_type; /* Stream type for allocation */ 387 struct snd_sst_lib_download lib_dnld; /* Valid only for codec dnld */ 388 }; 389 390 /* Drop response */ 391 struct snd_sst_drop_response { 392 u32 result; 393 u32 bytes; 394 }; 395 396 /* CSV Voice call routing structure */ 397 struct snd_sst_control_routing { 398 u8 control; /* 0=start, 1=Stop */ 399 u8 reserved[3]; /* Reserved- for 32 bit alignment */ 400 }; 401 402 403 struct ipc_post { 404 struct list_head node; 405 union ipc_header header; /* driver specific */ 406 char *mailbox_data; 407 }; 408 409 #endif /* __INTEL_SST_FW_IPC_H__ */ 410