Searched refs:saved_reg (Results 1 – 4 of 4) sorted by relevance
236 if (nv_encoder->dcb->type == OUTPUT_LVDS && dev_priv->saved_reg.sel_clk & 0xf0) { in nv04_dfp_prepare_sel_clk()237 int shift = (dev_priv->saved_reg.sel_clk & 0x50) ? 0 : 1; in nv04_dfp_prepare_sel_clk()288 struct nv04_crtc_reg *savep = &dev_priv->saved_reg.crtc_reg[nv_crtc->index]; in nv04_dfp_mode_set()594 (&dev_priv->saved_reg.crtc_reg[head].pllvals); in nv04_dfp_restore()
455 struct nv04_crtc_reg *savep = &dev_priv->saved_reg.crtc_reg[nv_crtc->index]; in nv_crtc_mode_set_regs()533 …regp->CRTC[NV_CIO_CRE_TVOUT_LATENCY] = dev_priv->saved_reg.crtc_reg[0].CRTC[NV_CIO_CRE_TVOUT_LATEN… in nv_crtc_mode_set_regs()634 struct nv04_mode_state *saved = &dev_priv->saved_reg; in nv_crtc_save()654 uint8_t saved_cr21 = dev_priv->saved_reg.crtc_reg[head].CRTC[NV_CIO_CRE_21]; in nv_crtc_restore()659 nouveau_hw_load_state(crtc->dev, head, &dev_priv->saved_reg); in nv_crtc_restore()
743 struct nv04_mode_state saved_reg; member
803 int saved_reg; in sx_interrupt() local821 saved_reg = bp->reg; in sx_interrupt()863 bp->reg = saved_reg; in sx_interrupt()