Searched refs:regm (Results 1 – 4 of 4) sorted by relevance
/linux-2.6.39/drivers/video/omap2/dss/ |
D | hdmi.c | 175 r = FLD_MOD(r, fmt->regm, 20, 9); /* CFG1_PLL_REGM */ in hdmi_pll_init() 1072 pi->regm = (phy * 100/(refclk))/100; in hdmi_compute_pll() 1080 mf = (phy - pi->regm * refclk) * 262144; in hdmi_compute_pll() 1088 pi->regsd = ((pi->regm * clkin / 10) / ((n + 1) * 250) + 5) / 10; in hdmi_compute_pll() 1090 DSSDBG("M = %d Mf = %d\n", pi->regm, pi->regmf); in hdmi_compute_pll()
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D | dsi.c | 1084 if (cinfo->regm == 0 || cinfo->regm > dsi.regm_max) in dsi_calc_clock_rates() 1112 cinfo->clkin4ddr = 2 * cinfo->regm * cinfo->fint; in dsi_calc_clock_rates() 1189 for (cur.regm = 1; cur.regm < dsi.regm_max; ++cur.regm) { in dsi_pll_calc_clock_div_pck() 1192 a = 2 * cur.regm * (cur.clkin/1000); in dsi_pll_calc_clock_div_pck() 1287 dsi.current_cinfo.regm = cinfo->regm; in dsi_pll_set_clock_div() 1300 cinfo->regm, in dsi_pll_set_clock_div() 1334 l = FLD_MOD(l, cinfo->regm, regm_start, regm_end); in dsi_pll_set_clock_div() 1511 cinfo->clkin4ddr, cinfo->regm); in dsi_dump_clocks() 3326 cinfo.regm = dssdev->phy.dsi.div.regm; in dsi_configure_dsi_clocks()
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D | dss.h | 165 u16 regm; member 179 u16 regm; member
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/linux-2.6.39/arch/arm/plat-omap/include/plat/ |
D | display.h | 406 u16 regm; member
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