Searched refs:reg32_write (Results 1 – 3 of 3) sorted by relevance
| /linux-2.6.39/arch/arm/mach-bcmring/csp/chipc/ |
| D | chipcHw.c | 431 …reg32_write(&pChipcHw->PLLDivider, (pChipcHw->PLLDivider & 0x00FFFFFF) | ((chipcHw_REG_PLL_DIVIDER… in chipcHw_setClockFrequency()
530 …reg32_write(&pChipcHw->VPMClock, (pChipcHw->VPMClock & (~chipcHw_REG_PLL_CLOCK_PHASE_CONTROL_MASK)… in vpmPhaseAlignA0()
560 …reg32_write(&pChipcHw->VPMClock, (pChipcHw->VPMClock & (~chipcHw_REG_PLL_CLOCK_PHASE_CONTROL_MASK)… in vpmPhaseAlignA0()
584 …reg32_write(&pChipcHw->VPMClock, (pChipcHw->VPMClock & (~chipcHw_REG_PLL_CLOCK_PHASE_CONTROL_MASK)… in vpmPhaseAlignA0()
608 …reg32_write(&pChipcHw->VPMClock, (pChipcHw->VPMClock & (~chipcHw_REG_PLL_CLOCK_PHASE_CONTROL_MASK)… in vpmPhaseAlignA0()
634 …reg32_write(&pChipcHw->VPMClock, (pChipcHw->VPMClock & (~chipcHw_REG_PLL_CLOCK_PHASE_CONTROL_MASK)… in vpmPhaseAlignA0()
723 …reg32_write(&pChipcHw->VPMClock, (pChipcHw->VPMClock & (~chipcHw_REG_PLL_CLOCK_PHASE_CONTROL_MASK)… in chipcHw_vpmPhaseAlign()
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| /linux-2.6.39/arch/arm/mach-bcmring/include/mach/csp/ |
| D | chipcHw_inline.h | 267 reg32_write(&pChipcHw->MiscCtrl, mask); in chipcHw_miscControl()
444 reg32_write(&pChipcHw->SoftStraps, strapOptions); in chipcHw_setSoftStraps()
598 reg32_write(&pChipcHw->LcdPifMode, chipcHw_REG_PIF_PIN_ENABLE); in chipcHw_activatePifInterface()
621 reg32_write(&pChipcHw->LcdPifMode, chipcHw_REG_LCD_PIN_ENABLE); in chipcHw_activateLcdInterface()
637 reg32_write(&pChipcHw->LcdPifMode, 0); in chipcHw_deactivatePifLcdInterface()
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| /linux-2.6.39/arch/arm/mach-bcmring/include/csp/ |
| D | reg.h | 109 static inline void reg32_write(volatile uint32_t *reg, uint32_t value) in reg32_write() function
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