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Searched refs:rFPGA0_AnalogParameter1 (Results 1 – 8 of 8) sorted by relevance

/linux-2.6.39/drivers/staging/rtl8192e/
Dr8190_rtl8256.c355 rtl8192_setBBreg(priv, rFPGA0_AnalogParameter1, 0x4, 0x1); // 0x880[2] in SetRFPowerState8190()
364 rtl8192_setBBreg(priv, rFPGA0_AnalogParameter1, 0x18, 0x3); // 0x880[4:3] in SetRFPowerState8190()
370 rtl8192_setBBreg(priv, rFPGA0_AnalogParameter1, 0x60, 0x3); // 0x880[6:5] in SetRFPowerState8190()
Dr819xE_phy.c1356 rtl8192_setBBreg(priv, rFPGA0_AnalogParameter1, bXtalCap92x, dwRegValue); in rtl8192_BB_Config_ParaFile()
2072 rtl8192_setBBreg(priv, rFPGA0_AnalogParameter1, 0x00100000, 1); in rtl8192_SetBWModeWorkItem()
2100 rtl8192_setBBreg(priv, rFPGA0_AnalogParameter1, 0x00100000, 0); in rtl8192_SetBWModeWorkItem()
Dr819xE_phyreg.h76 #define rFPGA0_AnalogParameter1 0x880 macro
Dr8192E_core.c736 rtl8192_setBBreg(priv, rFPGA0_AnalogParameter1, 0x18, 0x0); in PHY_SetRtl8192eRfOff()
742 rtl8192_setBBreg(priv, rFPGA0_AnalogParameter1, 0x60, 0x0); in PHY_SetRtl8192eRfOff()
743 rtl8192_setBBreg(priv, rFPGA0_AnalogParameter1, 0x4, 0x0); in PHY_SetRtl8192eRfOff()
/linux-2.6.39/drivers/staging/rtl8192u/
Dr819xU_phy.c815 rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, bXtalCap, dwRegValue); in rtl8192_BB_Config_ParaFile()
1086 rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x18, 0x3); // 0x880[4:3] in rtl8192_SetRFPowerState()
1092 rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x60, 0x3); // 0x880[6:5] in rtl8192_SetRFPowerState()
1107 rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x18, 0x0); // 0x880[4:3] in rtl8192_SetRFPowerState()
1113 rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x60, 0x0); // 0x880[6:5] in rtl8192_SetRFPowerState()
1556 rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x00100000, 1); in rtl8192_SetBWModeWorkItem()
1587 rtl8192_setBBreg(dev, rFPGA0_AnalogParameter1, 0x00100000, 0); in rtl8192_SetBWModeWorkItem()
Dr819xU_phyreg.h70 #define rFPGA0_AnalogParameter1 0x880 macro
/linux-2.6.39/drivers/staging/rtl8712/
Drtl871x_mp_phy_regdef.h120 #define rFPGA0_AnalogParameter1 0x880 /* Crystal cap setting macro
Drtl871x_mp.c484 set_bb_reg(pAdapter, rFPGA0_AnalogParameter1, bXtalCap, in r8712_SetCrystalCap()