Searched refs:pll_pwr_dn (Results 1 – 2 of 2) sorted by relevance
154 …uint32_t pll_pwr_dn:1; /* When set, powers down the main PLL. The alternate clock bit should be … member
73 rst_clk_cntrl.pll_pwr_dn = 0; in crystalhd_bring_out_of_rst()156 rst_clk_cntrl.pll_pwr_dn = 1; in crystalhd_put_in_reset()