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/linux-2.6.39/arch/arm/mach-lpc32xx/
Dclock.c107 static const u32 pll_postdivs[4] = {1, 2, 4, 8}; variable
218 pllcfg.pll_p = pll_postdivs[((regval >> 11) & 0x3)]; in clk_get_pllrate_from_reg()
281 pllsetup->pll_p = pll_postdivs[0]; in local_clk_find_pll_cfg()
293 pllsetup->pll_p = pll_postdivs[p]; in local_clk_find_pll_cfg()
305 pllsetup->pll_p = pll_postdivs[0]; in local_clk_find_pll_cfg()
328 pllsetup->pll_p = pll_postdivs[p]; in local_clk_find_pll_cfg()
348 pllsetup->pll_p = pll_postdivs[p]; in local_clk_find_pll_cfg()