Searched refs:pllSCLK_CNTL2 (Results 1 – 2 of 2) sorted by relevance
167 tmp = INPLL(pllSCLK_CNTL2); in radeon_pm_disable_dynamic_mode()171 OUTPLL(pllSCLK_CNTL2, tmp); in radeon_pm_disable_dynamic_mode()261 tmp = INPLL(pllSCLK_CNTL2); in radeon_pm_disable_dynamic_mode()265 OUTPLL(pllSCLK_CNTL2, tmp); in radeon_pm_disable_dynamic_mode()351 tmp = INPLL(pllSCLK_CNTL2); in radeon_pm_enable_dynamic_mode()358 OUTPLL(pllSCLK_CNTL2, tmp); in radeon_pm_enable_dynamic_mode()442 tmp = INPLL(pllSCLK_CNTL2); in radeon_pm_enable_dynamic_mode()446 OUTPLL(pllSCLK_CNTL2, tmp); in radeon_pm_enable_dynamic_mode()1877 tmp = INPLL(pllSCLK_CNTL2); /* What for ? */ in radeon_reinitialize_M10()1878 OUTPLL(pllSCLK_CNTL2, tmp); in radeon_reinitialize_M10()
1925 #define pllSCLK_CNTL2 0x001E macro