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Searched refs:pci_write_32 (Results 1 – 6 of 6) sorted by relevance

/linux-2.6.39/drivers/staging/cxt1e1/
Dcomet.c78 pci_write_32 ((u_int32_t *) &comet->gbl_cfg, 0xa0); /* Select T1 Mode & PIO in init_comet()
84 pci_write_32 ((u_int32_t *) &comet->gbl_cfg, 0x81); /* Select E1 Mode & PIO in init_comet()
95 pci_write_32 ((u_int32_t *) &comet->tx_line_cfg, 0x00); /* Transmit Line in init_comet()
99 pci_write_32 ((u_int32_t *) &comet->mtest, 0x00); /* making sure it's in init_comet()
103 pci_write_32 ((u_int32_t *) &comet->rjat_cfg, 0x10); /* RJAT cfg */ in init_comet()
107 pci_write_32 ((u_int32_t *) &comet->rjat_n1clk, 0x2F); /* RJAT Divider N1 in init_comet()
109 pci_write_32 ((u_int32_t *) &comet->rjat_n2clk, 0x2F); /* RJAT Divider N2 in init_comet()
113 pci_write_32 ((u_int32_t *) &comet->rjat_n1clk, 0xFF); /* RJAT Divider N1 in init_comet()
115 pci_write_32 ((u_int32_t *) &comet->rjat_n2clk, 0xFF); /* RJAT Divider N2 in init_comet()
120 pci_write_32 ((u_int32_t *) &comet->tjat_cfg, 0x10); /* TJAT Config. */ in init_comet()
[all …]
Dpmc93x6_eeprom.c176 pci_write_32 ((u_int32_t *) addr, output); /* Output it */ in eeprom_put_byte()
232 pci_write_32 ((u_int32_t *) addr, 0); /* this removes Chip Select in disable_pmc_eeprom()
249 pci_write_32 ((u_int32_t *) addr, 0); /* this removes Chip Select in enable_pmc_eeprom()
284 pci_write_32 ((u_int32_t *) addr, 0); /* Remove Chip Select from in pmc_eeprom_read()
326 pci_write_32 ((u_int32_t *) addr, 0); /* Remove Chip Select from in pmc_eeprom_write()
335 pci_write_32 ((u_int32_t *) addr, EPROM_ENCS); /* Re-enable Chip Select */ in pmc_eeprom_write()
343 pci_write_32 ((u_int32_t *) addr, 0); /* Remove Chip Select in pmc_eeprom_write()
Dpmcc4_drv.c526 pci_write_32 ((u_int32_t *) &ci->cpldbase->leds, LEDval & 0xff); in checkPorts()
557 pci_write_32 ((u_int32_t *) &ci->cpldbase->leds, PMCC4_CPLD_LED_OFF); in c4_cleanup()
597 pci_write_32 ((u_int32_t *) &comet->mdiag, wdata); in c4_get_portcfg()
628 pci_write_32 ((u_int32_t *) &ci->reg->glcd, GCD_MAGIC); in c4_init()
631 pci_write_32 ((u_int32_t *) &ci->reg->glcd, GCD_MAGIC | MUSYCC_GCD_INTB_DISABLE); in c4_init()
729 pci_write_32 ((u_int32_t *) &ci->cpldbase->leds, in c4_init()
732 pci_write_32 ((u_int32_t *) &ci->cpldbase->leds, PMCC4_CPLD_LED_OFF); in c4_init()
788 pci_write_32 ((u_int32_t *) &comet->ibcd_cfg, 0x05); in c4_loop_port()
792 pci_write_32 ((u_int32_t *) &comet->ibcd_cfg, 0x00); in c4_loop_port()
796 pci_write_32 ((u_int32_t *) &comet->mdiag, cmd); in c4_loop_port()
[all …]
Dsbecom_inline_linux.h99 pci_write_32 (u_int32_t *p, u_int32_t v)
118 void pci_write_32 (u_int32_t *p, u_int32_t v);
Dmusycc.c352 pci_write_32 (addr, cfg); in musycc_init_mdt()
552 pci_write_32 ((u_int32_t *) &pi->up->cpldbase->leds, led); /* RLD DEBUG TRANHANG */ in rld_put_led()
613 pci_write_32 ((u_int32_t *) &pi->reg->srd, req); in musycc_serv_req()
804 pci_write_32 ((u_int32_t *) &pi->reg->gbp, OS_vtophys (pi->regram)); in musycc_init_port()
895 pci_write_32 ((u_int32_t *) &ci->reg->gbp, OS_vtophys (ci->regram)); in musycc_init()
906 pci_write_32 ((u_int32_t *) &ci->reg->dacbp, 0); in musycc_init()
1245 pci_write_32 ((u_int32_t *) &ci->reg->isd, status); in musycc_intr_th_handler()
1351 pci_write_32 ((u_int32_t *) &ci->reg->isd, currInt); in musycc_intr_th_handler()
1355 pci_write_32 ((u_int32_t *) &ci->reg->isd, currInt); in musycc_intr_th_handler()
1361 pci_write_32 ((u_int32_t *) &ci->reg->isd, currInt); in musycc_intr_th_handler()
Dfunctions.c80 pci_write_32 (u_int32_t *p, u_int32_t v) in pci_write_32() function
277 pci_write_32 ((u_int32_t *) &CI->cpldbase->leds, y); in VMETRO_TRACE()