/linux-2.6.39/drivers/gpu/drm/radeon/ |
D | radeon_clocks.c | 67 struct radeon_pll *mpll = &rdev->clock.mpll; in radeon_legacy_get_memory_clock() local 73 fb_div *= mpll->reference_freq; in radeon_legacy_get_memory_clock() 107 struct radeon_pll *mpll = &rdev->clock.mpll; in radeon_read_clocks_OF() local 143 spll->reference_freq = mpll->reference_freq = p1pll->reference_freq; in radeon_read_clocks_OF() 144 spll->reference_div = mpll->reference_div = in radeon_read_clocks_OF() 180 struct radeon_pll *mpll = &rdev->clock.mpll; in radeon_get_clock_info() local 212 if (mpll->reference_div < 2) in radeon_get_clock_info() 213 mpll->reference_div = spll->reference_div; in radeon_get_clock_info() 224 mpll->reference_freq = 1432; in radeon_get_clock_info() 229 mpll->reference_freq = 2700; in radeon_get_clock_info() [all …]
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D | radeon_combios.c | 770 struct radeon_pll *mpll = &rdev->clock.mpll; in radeon_combios_get_clock_info() local 811 mpll->reference_freq = RBIOS16(pll_info + 0x26); in radeon_combios_get_clock_info() 812 mpll->reference_div = RBIOS16(pll_info + 0x28); in radeon_combios_get_clock_info() 813 mpll->pll_out_min = RBIOS32(pll_info + 0x2a); in radeon_combios_get_clock_info() 814 mpll->pll_out_max = RBIOS32(pll_info + 0x2e); in radeon_combios_get_clock_info() 817 mpll->pll_in_min = RBIOS32(pll_info + 0x5a); in radeon_combios_get_clock_info() 818 mpll->pll_in_max = RBIOS32(pll_info + 0x5e); in radeon_combios_get_clock_info() 821 mpll->pll_in_min = 40; in radeon_combios_get_clock_info() 822 mpll->pll_in_max = 500; in radeon_combios_get_clock_info()
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D | radeon_atombios.c | 1126 struct radeon_pll *mpll = &rdev->clock.mpll; in radeon_atom_get_clock_info() local 1205 mpll->reference_freq = in radeon_atom_get_clock_info() 1208 mpll->reference_freq = in radeon_atom_get_clock_info() 1210 mpll->reference_div = 0; in radeon_atom_get_clock_info() 1212 mpll->pll_out_min = in radeon_atom_get_clock_info() 1214 mpll->pll_out_max = in radeon_atom_get_clock_info() 1218 if (mpll->pll_out_min == 0) { in radeon_atom_get_clock_info() 1220 mpll->pll_out_min = 64800; in radeon_atom_get_clock_info() 1222 mpll->pll_out_min = 20000; in radeon_atom_get_clock_info() 1225 mpll->pll_in_min = in radeon_atom_get_clock_info() [all …]
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D | radeon.h | 162 struct radeon_pll mpll; member
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/linux-2.6.39/arch/arm/mach-s5p6442/ |
D | clock.c | 288 unsigned long mpll; in s5p6442_setup_clocks() local 299 mpll = s5p_get_pll45xx(xtal, __raw_readl(S5P_MPLL_CON), pll_4502); in s5p6442_setup_clocks() 303 apll, mpll, epll); in s5p6442_setup_clocks() 306 clk_fout_mpll.rate = mpll; in s5p6442_setup_clocks()
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/linux-2.6.39/arch/arm/mach-s3c64xx/ |
D | clock.c | 754 unsigned long mpll; in s3c6400_setup_clocks() local 775 mpll = s3c6400_get_pll(xtal, __raw_readl(S3C_MPLL_CON)); in s3c6400_setup_clocks() 778 fclk = mpll; in s3c6400_setup_clocks() 781 apll, mpll, epll); in s3c6400_setup_clocks() 783 hclk2 = mpll / GET_DIV(clkdiv0, S3C6400_CLKDIV0_HCLK2); in s3c6400_setup_clocks() 790 clk_fout_mpll.rate = mpll; in s3c6400_setup_clocks()
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/linux-2.6.39/arch/arm/mach-s5p64x0/ |
D | clock-s5p6440.c | 548 unsigned long mpll; in s5p6440_setup_clocks() local 566 mpll = s5p_get_pll45xx(xtal, __raw_readl(S5P64X0_MPLL_CON), pll_4502); in s5p6440_setup_clocks() 571 clk_fout_mpll.rate = mpll; in s5p6440_setup_clocks() 576 print_mhz(apll), print_mhz(mpll), print_mhz(epll)); in s5p6440_setup_clocks()
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D | clock-s5p6450.c | 598 unsigned long mpll; in s5p6450_setup_clocks() local 617 mpll = s5p_get_pll45xx(xtal, __raw_readl(S5P64X0_MPLL_CON), pll_4502); in s5p6450_setup_clocks() 624 clk_fout_mpll.rate = mpll; in s5p6450_setup_clocks() 630 print_mhz(apll), print_mhz(mpll), print_mhz(epll), in s5p6450_setup_clocks()
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/linux-2.6.39/drivers/gpu/drm/nouveau/ |
D | nouveau_hw.c | 305 bool mpll = Preg == 0x4020; in setPLL_double_lowregs() local 308 uint32_t Pval = (oldPval & (mpll ? ~(0x77 << 16) : ~(7 << 16))) | in setPLL_double_lowregs() 323 if (mpll) { in setPLL_double_lowregs() 339 Pval |= mpll ? 1 << 12 : 1 << 8; in setPLL_double_lowregs() 343 if (mpll) { in setPLL_double_lowregs() 357 if (mpll) { in setPLL_double_lowregs() 366 if (mpll) { in setPLL_double_lowregs()
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/linux-2.6.39/arch/arm/mach-exynos4/ |
D | clock.c | 1132 unsigned long mpll; in exynos4_setup_clocks() local 1159 mpll = s5p_get_pll45xx(xtal, __raw_readl(S5P_MPLL_CON0), pll_4508); in exynos4_setup_clocks() 1168 clk_fout_mpll.rate = mpll; in exynos4_setup_clocks() 1173 apll, mpll, epll, vpll); in exynos4_setup_clocks()
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/linux-2.6.39/arch/arm/mach-s5pv210/ |
D | clock.c | 1155 unsigned long mpll; in s5pv210_setup_clocks() local 1182 mpll = s5p_get_pll45xx(xtal, __raw_readl(S5P_MPLL_CON), pll_4502); in s5pv210_setup_clocks() 1189 clk_fout_mpll.rate = mpll; in s5pv210_setup_clocks() 1194 apll, mpll, epll, vpll); in s5pv210_setup_clocks()
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/linux-2.6.39/arch/arm/mach-s5pc100/ |
D | clock.c | 1243 unsigned long mpll; in s5pc100_setup_clocks() local 1259 mpll = s5p_get_pll65xx(xtal, __raw_readl(S5P_MPLL_CON)); in s5pc100_setup_clocks() 1264 print_mhz(apll), print_mhz(mpll), print_mhz(epll), print_mhz(hpll)); in s5pc100_setup_clocks() 1267 clk_fout_mpll.rate = mpll; in s5pc100_setup_clocks()
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