/linux-2.6.39/arch/mips/mm/ |
D | cex-sb1.S | 64 sd k0,0x170($0) 77 sll k0,k1,1 97 bltz k0,unrecoverable 98 sll k0,1 105 bgez k0,unrecoverable 113 mfc0 k0,C0_CERR_I /* delay slot */ 115 and k1,k0 117 andi k0,0x1fe0 124 cache Index_Invalidate_I,(0<<13)(k0) 125 cache Index_Invalidate_I,(1<<13)(k0) [all …]
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D | cex-gen.S | 30 mfc0 k0,CP0_CONFIG 32 and k0,k0,k1 33 ori k0,k0,CONF_CM_UNCACHED 34 mtc0 k0,CP0_CONFIG
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D | cex-oct.S | 30 rdhwr k0, $0 /* get core_id */ 32 sll k0, k0, 3 33 PTR_ADDU k1, k0, k1 /* k1 = &cache_err_dcache[core_id] */ 35 dmfc0 k0, CP0_CACHEERR, 1 36 sd k0, (k1)
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/linux-2.6.39/arch/mips/kernel/ |
D | genex.S | 56 mfc0 k0, CP0_INDEX 63 PTR_L k0, exception_handlers(k1) 64 jr k0 79 li k0, 31<<2 84 beq k1, k0, handle_vced 85 li k0, 14<<2 86 beq k1, k0, handle_vcei 91 PTR_L k0, exception_handlers(k1) 92 jr k0 101 MFC0 k0, CP0_BADVADDR [all …]
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D | smtc-asm.S | 57 mfc0 k0,CP0_STATUS 58 ori k0,k0,ST0_EXL 59 mtc0 k0,CP0_STATUS 74 sll k1,k0,3 83 or k1,k1,k0 90 lw k0,PT_TCSTATUS(k1) 92 mtc0 k0,$2,1 94 lw k0,PT_EPC(k1) 95 mtc0 k0,CP0_EPC
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D | octeon_switch.S | 443 dmfc0 k0, $9,7 /* CvmCtl register. */ 444 bbit1 k0, 27, 1f /* Skip CvmCtl[NOMUL] */ 448 v3mulu k0, $0, $0 450 sd k0, PT_MTP(sp) /* PT_MTP has P0 */ 451 v3mulu k0, $0, $0 455 sd k0, PT_MTP+16(sp) /* PT_MTP+16 has P2 */ 456 v3mulu k0, $0, $0 459 sd k0, PT_MPL+8(sp) /* PT_MPL+8 has MPL1 */ 481 ld k0, PT_MPL+16(sp) /* MPL2 */ 492 MTM2 k0 /* MPL2 */
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D | traps.c | 1358 unsigned int k0 = 26; in set_except_vector() local 1363 UASM_i_LA(&buf, k0, handler); in set_except_vector() 1364 uasm_i_jr(&buf, k0); in set_except_vector()
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/linux-2.6.39/arch/mips/alchemy/common/ |
D | sleeper.S | 49 mfc0 k0, CP0_STATUS 50 sw k0, 0x20(sp) 51 mfc0 k0, CP0_CONTEXT 52 sw k0, 0x1c(sp) 53 mfc0 k0, CP0_PAGEMASK 54 sw k0, 0x18(sp) 55 mfc0 k0, CP0_CONFIG 56 sw k0, 0x14(sp) 71 la k0, alchemy_sleep_wakeup /* resume path */ 72 sw k0, 0x001c(t3) [all …]
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/linux-2.6.39/arch/sh/kernel/cpu/sh3/ |
D | entry.S | 70 #define k0 r0 macro 199 mov.l 2f, k0 200 mov.l @k0, k0 201 jmp @k0 265 mov k3, k0 ! Calculate IMASK-bits 266 shlr2 k0 267 and #0x3c, k0 268 cmp/eq #0x3c, k0 270 shll2 k0 271 mov g_imask, k0 [all …]
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D | swsusp.S | 16 #define k0 r0 macro 116 stc r2_bank, k0 ! fetch old sp from r2_bank0
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/linux-2.6.39/arch/mips/dec/prom/ |
D | locore.S | 19 mfc0 k0, CP0_STATUS 22 sw k0, 0(k1) 24 mfc0 k0, CP0_EPC 26 addiu k0, 4 # skip the causing instruction 27 jr k0
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/linux-2.6.39/arch/sh/boards/mach-hp6xx/ |
D | pm_wakeup.S | 20 #define k0 r0 macro 26 and #127, k0 27 mov.b k0, @k1 30 mov.w 6f, k0 31 mov.w k0, @k1
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/linux-2.6.39/arch/mips/boot/compressed/ |
D | head.S | 39 PTR_LA k0, decompress_kernel 40 jr k0 47 PTR_LI k0, KERNEL_ENTRY 48 jr k0
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/linux-2.6.39/arch/mips/include/asm/ |
D | stackframe.h | 102 CPU_ID_MFC0 k0, CPU_ID_REG 112 LONG_SRL k0, PTEBASE_SHIFT 113 LONG_ADDU k1, k0 130 move k0, ra 139 1: move ra, k0 140 li k0, 3 141 mtc0 k0, $22 164 mfc0 k0, CP0_STATUS 165 sll k0, 3 /* extract cu0 bit */ 167 bltz k0, 8f [all …]
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D | regdef.h | 47 #define k0 $26 /* kernel scratch */ macro 90 #define k0 $26 /* kernel temporary */ macro
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/linux-2.6.39/crypto/ |
D | tea.c | 65 u32 k0, k1, k2, k3; in tea_encrypt() local 73 k0 = ctx->KEY[0]; in tea_encrypt() 82 y += ((z << 4) + k0) ^ (z + sum) ^ ((z >> 5) + k1); in tea_encrypt() 93 u32 k0, k1, k2, k3; in tea_decrypt() local 101 k0 = ctx->KEY[0]; in tea_decrypt() 112 y -= ((z << 4) + k0) ^ (z + sum) ^ ((z >> 5) + k1); in tea_decrypt()
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D | vmac.c | 243 #define k0 (*(((u32 *)kl)+INDEX_LOW)) in poly_step_func() macro 256 p += MUL32(a2, k0); in poly_step_func() 262 p += MUL32(a3, k0); in poly_step_func() 266 p += MUL32(a0, k0); in poly_step_func() 276 p += MUL32(a1, k0); in poly_step_func() 289 #undef k0 in poly_step_func()
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/linux-2.6.39/arch/sh/kernel/cpu/shmobile/ |
D | sleep.S | 24 #define k0 r0 macro 253 mov.l 1f, k0 254 and k0, k1 260 mov.l @(SH_SLEEP_SR, k1), k0 261 ldc k0, sr
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/linux-2.6.39/Documentation/sh/ |
D | register-banks.txt | 24 - r0_bank, r1_bank (referenced as k0 and k1, used for scratch
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/linux-2.6.39/arch/ia64/kvm/ |
D | trampoline.S | 117 mov r16 = ar.k0; \ 154 mov ar.k0=r16; \
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