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Searched refs:irq_banks (Results 1 – 2 of 2) sorted by relevance

/linux-2.6.39/arch/arm/mach-omap2/
Dirq.c47 } __attribute__ ((aligned(4))) irq_banks[] = { variable
87 sir = intc_bank_read_reg(&irq_banks[0], INTC_SIR); in omap_check_spurious()
103 intc_bank_write_reg(0x1, &irq_banks[0], INTC_CONTROL); in omap_ack_irq()
127 intc_bank_write_reg(1 << irq, &irq_banks[0], INTC_MIR_SET0 + offset); in omap_mask_irq()
137 intc_bank_write_reg(1 << irq, &irq_banks[0], INTC_MIR_CLEAR0 + offset); in omap_unmask_irq()
177 for (i = 0; i < ARRAY_SIZE(irq_banks); i++) { in omap_irq_pending()
178 struct omap_irq_bank *bank = irq_banks + i; in omap_irq_pending()
195 for (i = 0; i < ARRAY_SIZE(irq_banks); i++) { in omap_init_irq()
197 struct omap_irq_bank *bank = irq_banks + i; in omap_init_irq()
232 static struct omap3_intc_regs intc_context[ARRAY_SIZE(irq_banks)];
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/linux-2.6.39/arch/arm/mach-omap1/
Dirq.c62 static struct omap_irq_bank *irq_banks; variable
66 return omap_readl(irq_banks[bank].base_reg + offset); in irq_bank_readl()
71 omap_writel(value, irq_banks[bank].base_reg + offset); in irq_bank_writel()
87 l = omap_readl(irq_banks[bank].base_reg + IRQ_MIR_REG_OFFSET); in omap_mask_irq()
89 omap_writel(l, irq_banks[bank].base_reg + IRQ_MIR_REG_OFFSET); in omap_mask_irq()
97 l = omap_readl(irq_banks[bank].base_reg + IRQ_MIR_REG_OFFSET); in omap_unmask_irq()
99 omap_writel(l, irq_banks[bank].base_reg + IRQ_MIR_REG_OFFSET); in omap_unmask_irq()
113 irq_banks[bank].wake_enable |= IRQ_BIT(d->irq); in omap_wake_irq()
115 irq_banks[bank].wake_enable &= ~IRQ_BIT(d->irq); in omap_wake_irq()
185 irq_banks = omap7xx_irq_banks; in omap_init_irq()
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