Searched refs:input_clock (Results 1 – 14 of 14) sorted by relevance
173 if (chip->input_clock != ECHO_CLOCK_INTERNAL) { in set_sample_rate()249 chip->input_clock = ECHO_CLOCK_INTERNAL; in set_input_clock()282 chip->input_clock = clock; in set_input_clock()299 if (chip->input_clock == ECHO_CLOCK_ADAT) in dsp_set_digital_mode()303 if (chip->input_clock == ECHO_CLOCK_SPDIF) in dsp_set_digital_mode()
260 if (chip->input_clock != ECHO_CLOCK_INTERNAL) { in set_sample_rate()266 set_input_clock(chip, chip->input_clock); in set_sample_rate()339 chip->input_clock = ECHO_CLOCK_INTERNAL; in set_input_clock()371 chip->input_clock = clock; in set_input_clock()387 if (chip->input_clock == ECHO_CLOCK_ADAT) in dsp_set_digital_mode()391 if (chip->input_clock == ECHO_CLOCK_SPDIF) in dsp_set_digital_mode()
169 if (chip->input_clock != ECHO_CLOCK_INTERNAL) { in set_sample_rate()264 chip->input_clock = ECHO_CLOCK_INTERNAL; in set_input_clock()294 chip->input_clock = clock; in set_input_clock()346 if (chip->input_clock == ECHO_CLOCK_ADAT) in dsp_set_digital_mode()351 if (chip->input_clock == ECHO_CLOCK_SPDIF) in dsp_set_digital_mode()
204 if (chip->input_clock != ECHO_CLOCK_INTERNAL) { in set_sample_rate()316 chip->input_clock = ECHO_CLOCK_INTERNAL; in set_input_clock()360 chip->input_clock = clock; in set_input_clock()376 if (chip->input_clock == ECHO_CLOCK_ADAT) in dsp_set_digital_mode()380 if (chip->input_clock == ECHO_CLOCK_SPDIF) in dsp_set_digital_mode()
166 if (chip->input_clock != ECHO_CLOCK_INTERNAL) { in set_sample_rate()216 chip->input_clock = clock_source; in set_input_clock()218 chip->comm_page->input_clock = cpu_to_le16(clock); in set_input_clock()
143 if (chip->input_clock == ECHO_CLOCK_ESYNC) in set_sample_rate()159 chip->input_clock = clock; in set_input_clock()
134 if (chip->input_clock == ECHO_CLOCK_SPDIF) in set_sample_rate()161 chip->input_clock = clock; in set_input_clock()
160 chip->input_clock = clock; in set_input_clock()170 chip->input_clock = clock; in set_input_clock()
100 return set_input_clock(chip, chip->input_clock); in set_input_auto_mute()
680 u16 input_clock; /* Chg. Input clock state 0xb68 2 */ member
404 u8 input_clock; /* Currently selected sample clock member
742 if (set_input_clock(chip, chip->input_clock) < 0) in restore_dsp_rettings()1006 chip->input_clock = ECHO_CLOCK_INTERNAL; in init_line_levels()
1590 clock = chip->input_clock; in snd_echo_clock_source_get()1612 if (chip->input_clock != dclock) { in snd_echo_clock_source_put()
196 u32 input_clock = clk_get_rate(dev->clk); in i2c_davinci_calc_clk_dividers() local215 psc = (input_clock / 7000000) - 1; in i2c_davinci_calc_clk_dividers()216 if ((input_clock / (psc + 1)) > 12000000) in i2c_davinci_calc_clk_dividers()220 clk = ((input_clock / (psc + 1)) / (pdata->bus_freq * 1000)) - (d << 1); in i2c_davinci_calc_clk_dividers()228 dev_dbg(dev->dev, "input_clock = %d, CLK = %d\n", input_clock, clk); in i2c_davinci_calc_clk_dividers()