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Searched refs:inl (Results 1 – 25 of 251) sorted by relevance

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/linux-2.6.39/drivers/staging/comedi/drivers/addi-data/
Dhwdrv_apci3501.c83 *data = inl(devpriv->iobase + APCI3501_DIGITAL_IP); in i_APCI3501_ReadDigitalInput()
170 ui_Temp = inl(devpriv->iobase + APCI3501_DIGITAL_OP); in i_APCI3501_WriteDigitalOutput()
259 *data = inl(devpriv->iobase + APCI3501_DIGITAL_OP); in i_APCI3501_ReadDigitalOutput()
365 ul_DAC_Ready = inl(devpriv->iobase + APCI3501_ANALOG_OUTPUT); in i_APCI3501_WriteAnalogOutput()
368 ul_DAC_Ready = inl(devpriv->iobase + APCI3501_ANALOG_OUTPUT); in i_APCI3501_WriteAnalogOutput()
443 …ul_Command1 = inl(devpriv->iobase + APCI3501_WATCHDOG + APCI3501_TCW_PROG) | 0xFFF819E0UL; /* e2->… in i_APCI3501_ConfigTimerCounterWatchdog()
452 inl(devpriv->iobase + APCI3501_WATCHDOG + in i_APCI3501_ConfigTimerCounterWatchdog()
478 inl(devpriv->iobase + APCI3501_WATCHDOG + in i_APCI3501_ConfigTimerCounterWatchdog()
523 inl(devpriv->iobase + APCI3501_WATCHDOG + in i_APCI3501_StartStopWriteTimerCounterWatchdog()
536 inl(devpriv->iobase + APCI3501_WATCHDOG + in i_APCI3501_StartStopWriteTimerCounterWatchdog()
[all …]
Dhwdrv_apci035.c132 ui_Command = inl(devpriv->iobase + ((i_WatchdogNbr - 1) * 32) + 12); in i_APCI035_ConfigTimerWatchdog()
178 ui_Command = inl(devpriv->iobase + ((i_WatchdogNbr - 1) * 32) + 12); in i_APCI035_ConfigTimerWatchdog()
191 ui_Command = inl(devpriv->iobase + ((i_WatchdogNbr - 1) * 32) + 12); in i_APCI035_ConfigTimerWatchdog()
204 ui_Command = inl(devpriv->iobase + ((i_WatchdogNbr - 1) * 32) + 12); in i_APCI035_ConfigTimerWatchdog()
228 ui_Command = inl(devpriv->iobase + ((i_WatchdogNbr - 1) * 32) + 12); in i_APCI035_ConfigTimerWatchdog()
242 ui_Command = inl(devpriv->iobase + ((i_WatchdogNbr - 1) * 32) + 12); in i_APCI035_ConfigTimerWatchdog()
246 ui_Status = inl(devpriv->iobase + ((i_WatchdogNbr - 1) * 32) + 16); in i_APCI035_ConfigTimerWatchdog()
288 inl(devpriv->iobase + ((i_WatchdogNbr - 1) * 32) + 12); in i_APCI035_StartStopWriteTimerWatchdog()
298 inl(devpriv->iobase + ((i_WatchdogNbr - 1) * 32) + 12); in i_APCI035_StartStopWriteTimerWatchdog()
406 ui_Status = inl(devpriv->iobase + ((i_WatchdogNbr - 1) * 32) + 16); in i_APCI035_ReadTimerWatchdog()
[all …]
Dhwdrv_apci1564.c159 (unsigned int) inl(devpriv->i_IobaseAmcc + APCI1564_DIGITAL_IP); in i_APCI1564_Read1DigitalInput()
201 *data = (unsigned int) inl(devpriv->i_IobaseAmcc + APCI1564_DIGITAL_IP); in i_APCI1564_ReadMoreDigitalInput()
292 inl(devpriv->i_IobaseAmcc + APCI1564_DIGITAL_OP + in i_APCI1564_ConfigDigitalOutput()
326 inl(devpriv->i_IobaseAmcc + APCI1564_DIGITAL_OP + in i_APCI1564_WriteDigitalOutput()
499 *data = inl(devpriv->i_IobaseAmcc + APCI1564_DIGITAL_OP + in i_APCI1564_ReadDigitalOutput()
589 inl(devpriv->i_IobaseAmcc + APCI1564_TIMER + in i_APCI1564_ConfigTimerCounterWatchdog()
636 inl(devpriv->i_IobaseAmcc + APCI1564_TIMER + in i_APCI1564_ConfigTimerCounterWatchdog()
648 inl(devpriv->iobase + ((data[5] - 1) * 0x20) + in i_APCI1564_ConfigTimerCounterWatchdog()
752 inl(devpriv->i_IobaseAmcc + APCI1564_TIMER + in i_APCI1564_StartStopWriteTimerCounterWatchdog()
765 inl(devpriv->i_IobaseAmcc + APCI1564_TIMER + in i_APCI1564_StartStopWriteTimerCounterWatchdog()
[all …]
Dhwdrv_apci3200.c132 inl(dw_PCIBoardEepromAddress + in i_AddiHeaderRW_ReadEeprom()
149 inl(dw_PCIBoardEepromAddress + in i_AddiHeaderRW_ReadEeprom()
162 inl(dw_PCIBoardEepromAddress + in i_AddiHeaderRW_ReadEeprom()
175 inl(dw_PCIBoardEepromAddress + in i_AddiHeaderRW_ReadEeprom()
188 inl(dw_PCIBoardEepromAddress + in i_AddiHeaderRW_ReadEeprom()
201 inl(dw_PCIBoardEepromAddress + in i_AddiHeaderRW_ReadEeprom()
214 inl(dw_PCIBoardEepromAddress + in i_AddiHeaderRW_ReadEeprom()
553 *data = inl(devpriv->i_IobaseReserved); in i_APCI3200_ReadDigitalInput()
655 ui_Temp = inl(devpriv->i_IobaseAddon); in i_APCI3200_WriteDigitalOutput()
769 *data = inl(devpriv->i_IobaseAddon); in i_APCI3200_ReadDigitalOutput()
[all …]
Daddi_amcc_S5920.c88 inl(dw_PCIBoardEepromAddress + in i_AddiHeaderRW_ReadEeprom()
105 inl(dw_PCIBoardEepromAddress + in i_AddiHeaderRW_ReadEeprom()
118 inl(dw_PCIBoardEepromAddress + in i_AddiHeaderRW_ReadEeprom()
131 inl(dw_PCIBoardEepromAddress + in i_AddiHeaderRW_ReadEeprom()
144 inl(dw_PCIBoardEepromAddress + in i_AddiHeaderRW_ReadEeprom()
157 inl(dw_PCIBoardEepromAddress + in i_AddiHeaderRW_ReadEeprom()
170 inl(dw_PCIBoardEepromAddress + in i_AddiHeaderRW_ReadEeprom()
Dhwdrv_apci3xxx.c927 dw_Status = inl(devpriv->iobase + 80); in i_APCI3XXX_InsnBitsTTLIO()
955 dw_Status = inl(devpriv->iobase + 112); in i_APCI3XXX_InsnBitsTTLIO()
976 data[1] = inl(devpriv->iobase + 80); in i_APCI3XXX_InsnBitsTTLIO()
982 data[1] = data[1] | (inl(devpriv->iobase + 64) << 8); in i_APCI3XXX_InsnBitsTTLIO()
990 data[1] | (inl(devpriv->iobase + in i_APCI3XXX_InsnBitsTTLIO()
994 data[1] | (inl(devpriv->iobase + in i_APCI3XXX_InsnBitsTTLIO()
1059 pls_ReadData[0] = inl(devpriv->iobase + 80); in i_APCI3XXX_InsnReadTTLIO()
1071 pls_ReadData[0] = inl(devpriv->iobase + 64); in i_APCI3XXX_InsnReadTTLIO()
1088 inl(devpriv->iobase + in i_APCI3XXX_InsnReadTTLIO()
1095 inl(devpriv->iobase + in i_APCI3XXX_InsnReadTTLIO()
[all …]
Dhwdrv_apci1032.c109 inl(devpriv->iobase + APCI1032_DIGITAL_IP_IRQ); in i_APCI1032_ConfigDigitalInput()
154 ui_TmpValue = (unsigned int) inl(devpriv->iobase + APCI1032_DIGITAL_IP); in i_APCI1032_Read1DigitalInput()
197 *data = (unsigned int) inl(devpriv->iobase + APCI1032_DIGITAL_IP); in i_APCI1032_ReadMoreDigitalInput()
254 ui_Temp = inl(devpriv->iobase + APCI1032_DIGITAL_IP_IRQ); in v_APCI1032_Interrupt()
258 inl(devpriv->iobase + APCI1032_DIGITAL_IP_INTERRUPT_STATUS); in v_APCI1032_Interrupt()
283 …inl(devpriv->iobase + APCI1032_DIGITAL_IP_INTERRUPT_STATUS); /* Reset the interrupt status registe… in i_APCI1032_Reset()
Dhwdrv_APCI1710.c211 ret = inl(devpriv->s_BoardInfos.ui_Address + 60); in i_APCI1710_Reset()
214 ret = inl(devpriv->s_BoardInfos.ui_Address + 124); in i_APCI1710_Reset()
217 ret = inl(devpriv->s_BoardInfos.ui_Address + 188); in i_APCI1710_Reset()
220 ret = inl(devpriv->s_BoardInfos.ui_Address + 252); in i_APCI1710_Reset()
229 dw_Dummy = inl(devpriv->s_BoardInfos.ui_Address + 0x38); in i_APCI1710_Reset()
284 ul_82X54InterruptStatus = inl(devpriv->s_BoardInfos. in v_APCI1710_Interrupt()
350 ul_InterruptLatchReg = inl(devpriv->s_BoardInfos. in v_APCI1710_Interrupt()
368 inl(devpriv->s_BoardInfos. in v_APCI1710_Interrupt()
429 inl(devpriv->s_BoardInfos. in v_APCI1710_Interrupt()
484 ul_InterruptLatchReg = inl(devpriv->s_BoardInfos. in v_APCI1710_Interrupt()
[all …]
DAPCI1710_Tor.c711 inl in i_APCI1710_InsnConfigInitTorCounter()
1038 inl(devpriv->s_BoardInfos. in i_APCI1710_InsnWriteEnableDisableTorCounter()
1097 inl in i_APCI1710_InsnWriteEnableDisableTorCounter()
1204 inl in i_APCI1710_InsnWriteEnableDisableTorCounter()
1219 inl in i_APCI1710_InsnWriteEnableDisableTorCounter()
1296 dw_Status = inl(devpriv->s_BoardInfos. in i_APCI1710_InsnWriteEnableDisableTorCounter()
1512 dw_Status = inl(devpriv->s_BoardInfos. in i_APCI1710_InsnReadGetTorCounterInitialisation()
1523 dw_Status = inl(devpriv->s_BoardInfos. in i_APCI1710_InsnReadGetTorCounterInitialisation()
1771 dw_Status = inl(devpriv->s_BoardInfos. in i_APCI1710_InsnBitsGetTorCounterProgressStatusAndValue()
1794 inl(devpriv-> in i_APCI1710_InsnBitsGetTorCounterProgressStatusAndValue()
[all …]
Dhwdrv_apci2032.c113 ui_InterruptData = inl(devpriv->iobase + APCI2032_DIGITAL_OP_INTERRUPT); in i_APCI2032_ConfigDigitalOutput()
143 ui_Temp = inl(devpriv->iobase + APCI2032_DIGITAL_OP); in i_APCI2032_WriteDigitalOutput()
323 *data = inl(devpriv->iobase + APCI2032_DIGITAL_OP_RW); in i_APCI2032_ReadDigitalOutput()
474 inl(devpriv->iobase + APCI2032_DIGITAL_OP_WATCHDOG + in i_APCI2032_ReadWatchdog()
501 …ui_DO = inl(devpriv->iobase + APCI2032_DIGITAL_OP_IRQ) & 0x1; /* Check if VCC OR CC interrupt has … in v_APCI2032_Interrupt()
509 inl(devpriv->iobase + in v_APCI2032_Interrupt()
DAPCI1710_Ssi.c476 inl(devpriv-> in i_APCI1710_InsnReadSSIValue()
488 inl(devpriv-> in i_APCI1710_InsnReadSSIValue()
606 inl(devpriv-> in i_APCI1710_InsnReadSSIValue()
619 inl(devpriv-> in i_APCI1710_InsnReadSSIValue()
795 inl(devpriv->s_BoardInfos. in i_APCI1710_InsnBitsSSIDigitalIO()
818 inl(devpriv->s_BoardInfos.ui_Address + in i_APCI1710_InsnBitsSSIDigitalIO()
/linux-2.6.39/sound/pci/emu10k1/
Dio.c52 val = inl(emu->port + DATA); in snd_emu10k1_ptr_read()
59 val = inl(emu->port + DATA); in snd_emu10k1_ptr_read()
91 data |= inl(emu->port + DATA) & ~mask; in snd_emu10k1_ptr_write()
115 val = inl(emu->port + 0x20 + DATA); in snd_emu10k1_ptr20_read()
285 *value = ((inl(emu->port + A_IOCFG) >> 8) & 0x7f); in snd_emu1010_fpga_read()
310 enable = inl(emu->port + INTE) | intrenb; in snd_emu10k1_intr_enable()
321 enable = inl(emu->port + INTE) & ~intrenb; in snd_emu10k1_intr_disable()
335 val = inl(emu->port + DATA); in snd_emu10k1_voice_intr_enable()
339 val = inl(emu->port + DATA); in snd_emu10k1_voice_intr_enable()
355 val = inl(emu->port + DATA); in snd_emu10k1_voice_intr_disable()
[all …]
Demu10k1_main.c240 tmp = inl(emu->port + A_IOCFG) & ~0x8; /* Clear bit 3 */ in snd_emu10k1_init()
267 tmp = inl(emu->port + A_IOCFG); in snd_emu10k1_init()
269 tmp = inl(emu->port + A_IOCFG); in snd_emu10k1_init()
325 unsigned int reg = inl(emu->port + A_IOCFG); in snd_emu10k1_init()
332 unsigned int reg = inl(emu->port + HCFG); in snd_emu10k1_init()
346 unsigned int reg = inl(emu->port + A_IOCFG); in snd_emu10k1_init()
358 outl(inl(emu->port + HCFG) | HCFG_AUDIOENABLE, emu->port + HCFG); in snd_emu10k1_audio_enable()
366 outl(inl(emu->port + A_IOCFG) & ~0x44, emu->port + A_IOCFG); in snd_emu10k1_audio_enable()
372 outl(inl(emu->port + A_IOCFG) | 0x0040, emu->port + A_IOCFG); in snd_emu10k1_audio_enable()
375 outl(inl(emu->port + A_IOCFG) | 0x0060, emu->port + A_IOCFG); in snd_emu10k1_audio_enable()
[all …]
/linux-2.6.39/arch/mips/pci/
Dops-pnx8550.c37 pci_stat = inl(PCI_BASE | PCI_GPPM_STATUS); in clear_status()
61 if (inl(PCI_BASE | PCI_GPPM_STATUS)) { in config_access()
63 while (!(inl(PCI_BASE | PCI_GPPM_STATUS) == 0)) ; in config_access()
78 if (inl(PCI_BASE | PCI_GPPM_STATUS) & GPPM_DONE) { in config_access()
81 *val = inl(PCI_BASE | PCI_GPPM_RDAT); in config_access()
85 } else if (inl(PCI_BASE | PCI_GPPM_STATUS) & GPPM_R_MABORT) { in config_access()
98 __func__, inl(PCI_BASE | PCI_GPPM_CTRL), ioaddr, in config_access()
Dops-sni.c56 *val = inl(PCIMT_CONFIG_DATA); in pcimt_read()
112 outl(inl(0xcfc) | 0xc0000000, 0xcfc); in pcit_read()
117 if (inl(0xcfc) & 0x100000) in pcit_read()
131 *val = inl(PCIMT_CONFIG_DATA); in pcit_read()
/linux-2.6.39/arch/sparc/lib/
DPeeCeeI.c151 *pi++ = le32_to_cpu(inl(addr)); in insl()
161 l = le32_to_cpu(inl(addr)); in insl()
165 l2 = le32_to_cpu(inl(addr)); in insl()
176 l = le32_to_cpu(inl(addr)); in insl()
182 l2 = le32_to_cpu(inl(addr)); in insl()
193 l = le32_to_cpu(inl(addr)); in insl()
197 l2 = le32_to_cpu(inl(addr)); in insl()
/linux-2.6.39/drivers/net/tulip/
Dxircom_cb.c334 status = inl(card->io_port+CSR5); in xircom_interrupt()
516 val = inl(card->io_port + CSR0); in initialize_card()
522 val = inl(card->io_port + CSR0); in initialize_card()
670 val = inl(card->io_port + CSR5); /* Status register */ in link_status_changed()
696 val = inl(card->io_port + CSR5); /* Status register */ in transmit_active()
717 val = inl(card->io_port + CSR5); /* Status register */ in receive_active()
745 val = inl(card->io_port + CSR6); /* Operation mode */ in activate_receiver()
768 val = inl(card->io_port + CSR6); /* Operation mode */ in activate_receiver()
800 val = inl(card->io_port + CSR6); /* Operation mode */ in deactivate_receiver()
837 val = inl(card->io_port + CSR6); /* Operation mode */ in activate_transmitter()
[all …]
Dde4x5.c687 imr = inl(DE4X5_IMR);\
698 imr = inl(DE4X5_IMR);\
707 omr = inl(DE4X5_OMR);\
713 omr = inl(DE4X5_OMR);\
1065 i=inl(DE4X5_BMR);\
1071 for (i=0;i<5;i++) {inl(DE4X5_BMR); mdelay(1);}\
1116 if ((inl(DE4X5_STS) & (STS_TS | STS_RS)) != 0) { in de4x5_hw_init()
1347 printk("\tsts: 0x%08x\n", inl(DE4X5_STS)); in de4x5_open()
1348 printk("\tbmr: 0x%08x\n", inl(DE4X5_BMR)); in de4x5_open()
1349 printk("\timr: 0x%08x\n", inl(DE4X5_IMR)); in de4x5_open()
[all …]
/linux-2.6.39/drivers/net/mlx4/
Den_tx.c216 if (!tx_info->inl) { in mlx4_en_free_tx_desc()
239 if (!tx_info->inl) { in mlx4_en_free_tx_desc()
546 struct mlx4_wqe_inline_seg *inl = &tx_desc->inl; in build_inline_wqe() local
547 int spc = MLX4_INLINE_ALIGN - CTRL_SIZE - sizeof *inl; in build_inline_wqe()
550 inl->byte_count = cpu_to_be32(1 << 31 | skb->len); in build_inline_wqe()
551 skb_copy_from_linear_data(skb, inl + 1, skb_headlen(skb)); in build_inline_wqe()
553 memcpy(((void *)(inl + 1)) + skb_headlen(skb), fragptr, in build_inline_wqe()
557 inl->byte_count = cpu_to_be32(1 << 31 | spc); in build_inline_wqe()
559 skb_copy_from_linear_data(skb, inl + 1, skb_headlen(skb)); in build_inline_wqe()
561 memcpy(((void *)(inl + 1)) + skb_headlen(skb), in build_inline_wqe()
[all …]
/linux-2.6.39/arch/sh/boards/mach-dreamcast/
Dirq.c69 mask = inl(emr); in disable_systemasic_irq()
81 mask = inl(emr); in enable_systemasic_irq()
127 status = inl(esr); in systemasic_irq_demux()
128 status &= inl(emr); in systemasic_irq_demux()
/linux-2.6.39/drivers/leds/
Dleds-ss4200.c184 gpio_out = inl(nas_gpio_io_base + port); in __nasgpio_led_set_attr()
207 gpio_in = inl(nas_gpio_io_base + port); in nasgpio_led_get_attr()
282 config_data = inl(nas_gpio_io_base + GPIO_USE_SEL); in ich7_gpio_init()
286 config_data = inl(nas_gpio_io_base + GPIO_USE_SEL); in ich7_gpio_init()
295 config_data = inl(nas_gpio_io_base + GP_IO_SEL); in ich7_gpio_init()
301 config_data = inl(nas_gpio_io_base + GP_IO_SEL); in ich7_gpio_init()
308 config_data = inl(nas_gpio_io_base + GP_LVL); in ich7_gpio_init()
314 config_data = inl(nas_gpio_io_base + GPO_BLINK); in ich7_gpio_init()
320 config_data = inl(nas_gpio_io_base + GPI_INV); in ich7_gpio_init()
/linux-2.6.39/drivers/net/
Depic100.c183 #undef inl
189 #define inl readl macro
430 outl((inl(ioaddr + NVCTL) & ~0x003C) | 0x4800, ioaddr + NVCTL); in epic_init_one()
485 outl(inl(ioaddr + NVCTL) & ~0x483C, ioaddr + NVCTL); in epic_init_one()
544 #define eeprom_delay() inl(ee_addr)
562 inl(ioaddr + INTMASK); in __epic_pci_commit()
590 (inl(ee_addr) & 0x40 ? EE_READ64_CMD : EE_READ256_CMD); in read_eeprom()
608 retval = (retval << 1) | ((inl(ee_addr) & EE_DATA_READ) ? 1 : 0); in read_eeprom()
630 if ((inl(ioaddr + MIICtrl) & MII_READOP) == 0) { in mdio_read()
652 if ((inl(ioaddr + MIICtrl) & MII_WRITEOP) == 0) in mdio_write()
[all …]
/linux-2.6.39/arch/parisc/lib/
Dio.c253 *(unsigned int *)p = cpu_to_le32(inl(port)); in insl()
261 l = cpu_to_le32(inl(port)); in insl()
267 l2 = cpu_to_le32(inl(port)); in insl()
277 l = cpu_to_le32(inl(port)); in insl()
284 l2 = cpu_to_le32(inl(port)); in insl()
294 l = cpu_to_le32(inl(port)); in insl()
299 l2 = cpu_to_le32(inl(port)); in insl()
/linux-2.6.39/drivers/watchdog/
DiTCO_vendor_support.c89 val32 = inl(SMI_EN); in supermicro_old_pre_start()
99 val32 = inl(SMI_EN); in supermicro_old_pre_stop()
276 val32 = inl(SMI_EN); in broken_bios_start()
287 val32 = inl(SMI_EN); in broken_bios_stop()
/linux-2.6.39/drivers/gpio/
Dvx855_gpio.c114 reg_out = inl(vg->io_gpo); in vx855gpio_direction_input()
129 reg_in = inl(vg->io_gpi); in vx855gpio_get()
135 reg_in = inl(vg->io_gpo); in vx855gpio_get()
139 reg_in = inl(vg->io_gpi); in vx855gpio_get()
159 reg_out = inl(vg->io_gpo); in vx855gpio_set()

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