Searched refs:dregs (Results 1 – 10 of 10) sorted by relevance
100 static volatile struct sun3_dma_regs *dregs; variable191 dregs = (struct sun3_dma_regs *)(((unsigned char *)ioaddr) + 8); in sun3scsi_detect()193 if(sun3_map_test((unsigned long)dregs, &x)) { in sun3scsi_detect()196 oldcsr = dregs->csr; in sun3scsi_detect()197 dregs->csr = 0; in sun3scsi_detect()199 if(dregs->csr == 0x1400) in sun3scsi_detect()202 dregs->csr = oldcsr; in sun3scsi_detect()257 dregs->csr = 0; in sun3scsi_detect()259 dregs->csr = CSR_SCSI | CSR_FIFO | CSR_INTR; in sun3scsi_detect()261 dregs->fifo_count = 0; in sun3scsi_detect()[all …]
135 static volatile struct sun3_dma_regs *dregs; variable165 dregs->udc_addr = UDC_CSR; in sun3_udc_read()167 ret = dregs->udc_data; in sun3_udc_read()175 dregs->udc_addr = reg; in sun3_udc_write()177 dregs->udc_data = val; in sun3_udc_write()237 dregs = (struct sun3_dma_regs *)(((unsigned char *)ioaddr) + 8); in sun3scsi_detect()295 dregs->csr = 0; in sun3scsi_detect()297 dregs->csr = CSR_SCSI | CSR_FIFO | CSR_INTR; in sun3scsi_detect()299 dregs->fifo_count = 0; in sun3scsi_detect()375 unsigned short csr = dregs->csr; in scsi_sun3_intr()[all …]
1321 dregs->csr |= CSR_DMA_ENABLE; in NCR5380_intr()1334 dregs->csr |= CSR_DMA_ENABLE; in NCR5380_intr()1701 dregs->csr |= CSR_INTR; in NCR5380_select()1956 dregs->csr |= CSR_DMA_ENABLE; in NCR5380_transfer_dma()1998 dregs->csr |= CSR_INTR; in NCR5380_information_transfer()2035 dregs->csr |= CSR_INTR; in NCR5380_information_transfer()2353 dregs->csr |= CSR_DMA_ENABLE; in NCR5380_information_transfer()
244 void __iomem *dregs; /* DMA controller regs. */ member442 u32 csr = sbus_readl(lp->dregs + DMA_CSR); in init_restart_ledma()446 while (sbus_readl(lp->dregs + DMA_CSR) & DMA_FIFO_ISDRAIN) in init_restart_ledma()450 csr = sbus_readl(lp->dregs + DMA_CSR); in init_restart_ledma()464 sbus_writel(csr, lp->dregs + DMA_CSR); in init_restart_ledma()473 if (lp->dregs) in init_restart_lance()490 if (lp->dregs) in init_restart_lance()491 printk("dcsr=%8.8x\n", sbus_readl(lp->dregs + DMA_CSR)); in init_restart_lance()499 if (lp->dregs) { in init_restart_lance()500 u32 csr = sbus_readl(lp->dregs + DMA_CSR); in init_restart_lance()[all …]
169 dspreg_t *dregs; in compat_arch_ptrace() local176 dregs = __get_dsp_regs(child); in compat_arch_ptrace()177 tmp = (unsigned long) (dregs[addr - DSP_BASE]); in compat_arch_ptrace()269 dspreg_t *dregs; in compat_arch_ptrace() local276 dregs = __get_dsp_regs(child); in compat_arch_ptrace()277 dregs[addr - DSP_BASE] = data; in compat_arch_ptrace()
369 dspreg_t *dregs; in arch_ptrace() local376 dregs = __get_dsp_regs(child); in arch_ptrace()377 tmp = (unsigned long) (dregs[addr - DSP_BASE]); in arch_ptrace()458 dspreg_t *dregs; in arch_ptrace() local465 dregs = __get_dsp_regs(child); in arch_ptrace()466 dregs[addr - DSP_BASE] = data; in arch_ptrace()
214 #define DMA_IRQ_ENTRY(dma, dregs) do { \ argument215 if(DMA_ISBROKEN(dma)) DMA_INTSOFF(dregs); \218 #define DMA_IRQ_EXIT(dma, dregs) do { \ argument219 if(DMA_ISBROKEN(dma)) DMA_INTSON(dregs); \
43 unsigned long dregs[32]; member
61 #define d64txregs dregs.d64_u.txregs_6462 #define d64rxregs dregs.d64_u.rxregs_6463 #define txd64 dregs.d64_u.txd_6464 #define rxd64 dregs.d64_u.rxd_6494 } dregs; member1577 dma64regs_t *dregs = di->d64txregs; local1581 (((R_REG(&dregs->status0) &1587 (u16) (R_REG(&dregs->status1) &
436 unsigned long iregs, dregs; in register_info() local463 if (ia64_pal_debug_info(&iregs, &dregs)) in register_info()468 "Data debug register pairs : %ld\n", iregs, dregs); in register_info()