Searched refs:dcfg (Results 1 – 6 of 6) sorted by relevance
/linux-2.6.39/drivers/video/geode/ |
D | video_cs5530.c | 102 u32 dcfg; in cs5530_configure_display() local 104 dcfg = readl(par->vid_regs + CS5530_DISPLAY_CONFIG); in cs5530_configure_display() 107 dcfg &= ~(CS5530_DCFG_CRT_SYNC_SKW_MASK | CS5530_DCFG_PWR_SEQ_DLY_MASK in cs5530_configure_display() 114 dcfg |= (CS5530_DCFG_CRT_SYNC_SKW_INIT | CS5530_DCFG_PWR_SEQ_DLY_INIT in cs5530_configure_display() 119 dcfg |= CS5530_DCFG_DAC_PWR_EN; in cs5530_configure_display() 120 dcfg |= CS5530_DCFG_HSYNC_EN | CS5530_DCFG_VSYNC_EN; in cs5530_configure_display() 124 dcfg |= CS5530_DCFG_FP_PWR_EN; in cs5530_configure_display() 125 dcfg |= CS5530_DCFG_FP_DATA_EN; in cs5530_configure_display() 130 dcfg |= CS5530_DCFG_CRT_HSYNC_POL; in cs5530_configure_display() 132 dcfg |= CS5530_DCFG_CRT_VSYNC_POL; in cs5530_configure_display() [all …]
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D | video_gx.c | 239 u32 dcfg, misc; in gx_configure_display() local 242 dcfg = read_vp(par, VP_DCFG); in gx_configure_display() 245 dcfg &= ~(VP_DCFG_VSYNC_EN | VP_DCFG_HSYNC_EN); in gx_configure_display() 246 write_vp(par, VP_DCFG, dcfg); in gx_configure_display() 249 dcfg &= ~(VP_DCFG_CRT_SYNC_SKW in gx_configure_display() 254 dcfg |= VP_DCFG_CRT_SYNC_SKW_DEFAULT; in gx_configure_display() 257 dcfg |= VP_DCFG_HSYNC_EN | VP_DCFG_VSYNC_EN; in gx_configure_display() 274 dcfg |= VP_DCFG_CRT_HSYNC_POL; in gx_configure_display() 276 dcfg |= VP_DCFG_CRT_VSYNC_POL; in gx_configure_display() 286 dcfg |= VP_DCFG_CRT_EN | VP_DCFG_DAC_BL_EN; in gx_configure_display() [all …]
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D | display_gx.c | 64 u32 gcfg, dcfg; in gx_set_mode() local 72 dcfg = read_dc(par, DC_DISPLAY_CFG); in gx_set_mode() 75 dcfg &= ~DC_DISPLAY_CFG_TGEN; in gx_set_mode() 76 write_dc(par, DC_DISPLAY_CFG, dcfg); in gx_set_mode() 95 dcfg = 0; in gx_set_mode() 112 dcfg |= DC_DISPLAY_CFG_GDEN | DC_DISPLAY_CFG_VDEN | in gx_set_mode() 118 dcfg |= DC_DISPLAY_CFG_DISP_MODE_8BPP; in gx_set_mode() 121 dcfg |= DC_DISPLAY_CFG_DISP_MODE_16BPP; in gx_set_mode() 124 dcfg |= DC_DISPLAY_CFG_DISP_MODE_24BPP; in gx_set_mode() 125 dcfg |= DC_DISPLAY_CFG_PALB; in gx_set_mode() [all …]
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D | lxfb_ops.c | 352 unsigned int gcfg, dcfg; in lx_set_mode() local 441 dcfg = DC_DISPLAY_CFG_VDEN; /* Enable video data */ in lx_set_mode() 442 dcfg |= DC_DISPLAY_CFG_GDEN; /* Enable graphics */ in lx_set_mode() 443 dcfg |= DC_DISPLAY_CFG_TGEN; /* Turn on the timing generator */ in lx_set_mode() 444 dcfg |= DC_DISPLAY_CFG_TRUP; /* Update timings immediately */ in lx_set_mode() 445 dcfg |= DC_DISPLAY_CFG_PALB; /* Palette bypass in > 8 bpp modes */ in lx_set_mode() 446 dcfg |= DC_DISPLAY_CFG_VISL; in lx_set_mode() 447 dcfg |= DC_DISPLAY_CFG_DCEN; /* Always center the display */ in lx_set_mode() 453 dcfg |= DC_DISPLAY_CFG_DISP_MODE_8BPP; in lx_set_mode() 457 dcfg |= DC_DISPLAY_CFG_DISP_MODE_16BPP; in lx_set_mode() [all …]
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/linux-2.6.39/arch/cris/arch-v32/drivers/ |
D | cryptocop.c | 985 struct cryptocop_desc_cfg *dcfg = odsc->cfg; in cryptocop_setup_dma_list() local 994 while (dcfg) { in cryptocop_setup_dma_list() 999 if (digest_ctx.tcfg && (digest_ctx.tcfg->tid == dcfg->tid)){ in cryptocop_setup_dma_list() 1001 } else if (cipher_ctx.tcfg && (cipher_ctx.tcfg->tid == dcfg->tid)){ in cryptocop_setup_dma_list() 1003 } else if (csum_ctx.tcfg && (csum_ctx.tcfg->tid == dcfg->tid)){ in cryptocop_setup_dma_list() 1007 …PI(printk("cryptocop_setup_dma_list: invalid transform %d specified in descriptor.\n", dcfg->tid)); in cryptocop_setup_dma_list() 1012 DEBUG_API(printk("cryptocop_setup_dma_list: completed transform %d reused.\n", dcfg->tid)); in cryptocop_setup_dma_list() 1024 switch (dcfg->src){ in cryptocop_setup_dma_list() 1044 DEBUG_API(printk("cryptocop_setup_dma_list: bad unit source configured %d.\n", dcfg->src)); in cryptocop_setup_dma_list() 1082 if (dcfg->last) { in cryptocop_setup_dma_list() [all …]
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/linux-2.6.39/drivers/usb/gadget/ |
D | s3c-hsotg.c | 1100 u32 dcfg; in s3c_hsotg_process_control() local 1122 dcfg = readl(hsotg->regs + S3C_DCFG); in s3c_hsotg_process_control() 1123 dcfg &= ~S3C_DCFG_DevAddr_MASK; in s3c_hsotg_process_control() 1124 dcfg |= ctrl->wValue << S3C_DCFG_DevAddr_SHIFT; in s3c_hsotg_process_control() 1125 writel(dcfg, hsotg->regs + S3C_DCFG); in s3c_hsotg_process_control()
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