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Searched refs:daq_io_addr (Results 1 – 9 of 9) sorted by relevance

/linux-2.6.39/drivers/staging/comedi/drivers/
Dni_pcidio.c441 devpriv->mite->daq_io_addr + DMA_Line_Control_Group1); in ni_pcidio_request_di_mite_channel()
459 devpriv->mite->daq_io_addr + DMA_Line_Control_Group1); in ni_pcidio_release_di_mite_channel()
508 status = readb(devpriv->mite->daq_io_addr + in nidio_interrupt()
510 flags = readb(devpriv->mite->daq_io_addr + Group_1_Flags); in nidio_interrupt()
553 devpriv->mite->daq_io_addr + in nidio_interrupt()
567 devpriv->mite->daq_io_addr + in nidio_interrupt()
573 readl(devpriv->mite->daq_io_addr + in nidio_interrupt()
580 flags = readb(devpriv->mite->daq_io_addr + in nidio_interrupt()
595 devpriv->mite->daq_io_addr + in nidio_interrupt()
599 writeb(0x00, devpriv->mite->daq_io_addr + OpMode); in nidio_interrupt()
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Dni_6527.c146 devpriv->mite->daq_io_addr + Filter_Interval(0)); in ni6527_di_insn_config()
148 devpriv->mite->daq_io_addr + Filter_Interval(1)); in ni6527_di_insn_config()
150 devpriv->mite->daq_io_addr + Filter_Interval(2)); in ni6527_di_insn_config()
153 devpriv->mite->daq_io_addr + Clear_Register); in ni6527_di_insn_config()
164 devpriv->mite->daq_io_addr + Filter_Enable(0)); in ni6527_di_insn_config()
166 devpriv->mite->daq_io_addr + Filter_Enable(1)); in ni6527_di_insn_config()
168 devpriv->mite->daq_io_addr + Filter_Enable(2)); in ni6527_di_insn_config()
180 data[1] = readb(devpriv->mite->daq_io_addr + Port_Register(0)); in ni6527_di_insn_bits()
181 data[1] |= readb(devpriv->mite->daq_io_addr + Port_Register(1)) << 8; in ni6527_di_insn_bits()
182 data[1] |= readb(devpriv->mite->daq_io_addr + Port_Register(2)) << 16; in ni6527_di_insn_bits()
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Dni_65xx.c352 private(dev)->mite->daq_io_addr + in ni_65xx_config_filter()
365 private(dev)->mite->daq_io_addr + Filter_Enable(port)); in ni_65xx_config_filter()
388 writeb(0, private(dev)->mite->daq_io_addr + Port_Select(port)); in ni_65xx_dio_insn_config()
395 writeb(1, private(dev)->mite->daq_io_addr + Port_Select(port)); in ni_65xx_dio_insn_config()
455 private(dev)->mite->daq_io_addr + in ni_65xx_dio_insn_bits()
460 readb(private(dev)->mite->daq_io_addr + Port_Data(port)); in ni_65xx_dio_insn_bits()
485 status = readb(private(dev)->mite->daq_io_addr + Change_Status); in ni_65xx_interrupt()
492 private(dev)->mite->daq_io_addr + Clear_Register); in ni_65xx_interrupt()
584 private(dev)->mite->daq_io_addr + Clear_Register); in ni_65xx_intr_cmd()
587 private(dev)->mite->daq_io_addr + Master_Interrupt_Control); in ni_65xx_intr_cmd()
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Dni_670x.c243 writel(0x10, devpriv->mite->daq_io_addr + MISC_CONTROL_OFFSET); in ni_670x_attach()
245 writel(0x00, devpriv->mite->daq_io_addr + AO_CONTROL_OFFSET); in ni_670x_attach()
288 devpriv->mite->daq_io_addr + AO_CHAN_OFFSET); in ni_670x_ao_winsn()
290 writel(data[i], devpriv->mite->daq_io_addr + AO_VALUE_OFFSET); in ni_670x_ao_winsn()
323 devpriv->mite->daq_io_addr + DIO_PORT0_DATA_OFFSET); in ni_670x_dio_insn_bits()
328 data[1] = readl(devpriv->mite->daq_io_addr + DIO_PORT0_DATA_OFFSET); in ni_670x_dio_insn_bits()
355 writel(s->io_bits, devpriv->mite->daq_io_addr + DIO_PORT0_DIR_OFFSET); in ni_670x_dio_insn_config()
Dmite.c148 mite->daq_io_addr = ioremap(mite->daq_phys_addr, length); in mite_setup2()
149 if (!mite->daq_io_addr) { in mite_setup2()
154 (unsigned long long)mite->daq_phys_addr, mite->daq_io_addr); in mite_setup2()
233 if (mite->daq_io_addr) { in mite_unsetup()
234 iounmap(mite->daq_io_addr); in mite_unsetup()
235 mite->daq_io_addr = NULL; in mite_unsetup()
Dni_pcimio.c1286 #define ni_writel(a, b) (writel((a), devpriv->mite->daq_io_addr + (b)))
1287 #define ni_readl(a) (readl(devpriv->mite->daq_io_addr + (a)))
1288 #define ni_writew(a, b) (writew((a), devpriv->mite->daq_io_addr + (b)))
1289 #define ni_readw(a) (readw(devpriv->mite->daq_io_addr + (a)))
1290 #define ni_writeb(a, b) (writeb((a), devpriv->mite->daq_io_addr + (b)))
1291 #define ni_readb(a) (readb(devpriv->mite->daq_io_addr + (a)))
Dmite.h71 void *daq_io_addr; member
Dni_660x.c765 private(dev)->mite->daq_io_addr + GPCT_OFFSET[chip_index] + in ni_660x_write_register()
788 private(dev)->mite->daq_io_addr + GPCT_OFFSET[chip_index] + in ni_660x_read_register()
Dni_labpc.c738 iobase = (unsigned long)devpriv->mite->daq_io_addr; in labpc_attach()