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Searched refs:cx_set (Results 1 – 22 of 22) sorted by relevance

/linux-2.6.39/drivers/media/video/cx23885/
Dcx23885-cards.c780 cx_set(GP0_IO, bitmask); in cx23885_tuner_callback()
791 cx_set(GP0_IO, 0x00010001); /* Bring the part out of reset */ in cx23885_gpio_setup()
798 cx_set(GP0_IO, 0x00050000); in cx23885_gpio_setup()
803 cx_set(GP0_IO, 0x00050005); in cx23885_gpio_setup()
808 cx_set(GP0_IO, 0x00050005); /* Bring the part out of reset */ in cx23885_gpio_setup()
846 cx_set(GP0_IO, 0x00050000); in cx23885_gpio_setup()
850 cx_set(GP0_IO, 0x00050005); in cx23885_gpio_setup()
867 cx_set(GP0_IO, 0x00050000); in cx23885_gpio_setup()
871 cx_set(GP0_IO, 0x00050005); in cx23885_gpio_setup()
879 cx_set(GP0_IO, 0x00050000); in cx23885_gpio_setup()
[all …]
Dcx23885-vbi.c78 cx_set(VID_A_INT_MSK, 0x000022); in cx23885_start_vbi_dma()
81 cx_set(DEV_CNTRL2, (1<<5)); in cx23885_start_vbi_dma()
82 cx_set(VID_A_DMA_CTL, 0x00000022); in cx23885_start_vbi_dma()
Dcx23885-core.c321 cx_set(PCI_INT_MSK, mask); in cx23885_irq_add_enable()
334 cx_set(PCI_INT_MSK, v); in cx23885_irq_enable()
1385 cx_set(port->reg_ts_int_msk, port->ts_int_msk_val); in cx23885_start_dma()
1386 cx_set(port->reg_dma_ctl, port->dma_ctl_val); in cx23885_start_dma()
1394 cx_set(DEV_CNTRL2, (1<<5)); /* Enable RISC controller */ in cx23885_start_dma()
1941 cx_set(GP0_IO, mask & 0x7); in cx23885_gpio_set()
1948 cx_set(MC417_RWD, (mask & 0x0007fff8) >> 3); in cx23885_gpio_set()
1997 cx_set(GP0_IO, (mask & 0x7) << 16); in cx23885_gpio_enable()
2013 cx_set(MC417_OEN, (mask & 0x7fff8) >> 3); in cx23885_gpio_enable()
Dcimax2.c164 cx_set(MC417_RWD, NETUP_CTRL_OFF); in netup_ci_get_mem()
Dcx23885.h460 #define cx_set(reg, bit) cx_andor((reg), (bit), (bit)) macro
Dcx23885-video.c444 cx_set(VID_A_INT_MSK, 0x000011); in cx23885_start_video_dma()
447 cx_set(DEV_CNTRL2, (1<<5)); in cx23885_start_video_dma()
448 cx_set(VID_A_DMA_CTL, 0x11); /* FIFO and RISC enable */ in cx23885_start_video_dma()
Dcx23885-dvb.c627 cx_set(MC417_OEN, ALT_DATA); in netup_altera_fpga_rw()
656 cx_set(MC417_RWD, ALT_RD | ALT_WR | ALT_CS); in netup_altera_fpga_rw()
/linux-2.6.39/drivers/media/video/cx88/
Dcx88-vbi.c68 cx_set(MO_PCI_INTMSK, core->pci_irqmask | PCI_INT_VIDINT); in cx8800_start_vbi_dma()
69 cx_set(MO_VID_INTMSK, 0x0f0088); in cx8800_start_vbi_dma()
72 cx_set(VID_CAPTURE_CONTROL,0x18); in cx8800_start_vbi_dma()
75 cx_set(MO_DEV_CNTRL2, (1<<5)); in cx8800_start_vbi_dma()
76 cx_set(MO_VID_DMACNTRL, 0x88); in cx8800_start_vbi_dma()
Dcx88-dvb.c347 cx_set(MO_GP0_IO, 8); in lgdt330x_pll_rf_set()
440 cx_set(MO_GP0_IO, 0x6040); in tevii_dvbs_set_voltage()
446 cx_set(MO_GP0_IO, 0x20); in tevii_dvbs_set_voltage()
818 cx_set(MO_GP0_IO, 0x0800); in samsung_smt_7020_set_tone()
822 cx_set(MO_GP0_IO, 0x08); in samsung_smt_7020_set_tone()
847 cx_set(MO_GP0_IO, 0x8000); in samsung_smt_7020_set_voltage()
1136 cx_set(MO_GP0_IO, 1); in dvb_register()
1157 cx_set(MO_GP0_IO, 9); in dvb_register()
1175 cx_set(MO_GP0_IO, 1); in dvb_register()
1196 cx_set(MO_GP0_IO, 1); in dvb_register()
[all …]
Dcx88-cards.c2709 cx_set(MO_GP0_IO, 0x008989FF); in hauppauge_eeprom()
2782 cx_set(MO_GP0_IO, 0x00001000); in cx88_dvico_xc2028_callback()
2785 cx_set(MO_GP0_IO, 0x00000010); in cx88_dvico_xc2028_callback()
2791 cx_set(MO_GP0_IO, 0x101010); in cx88_dvico_xc2028_callback()
2838 cx_set(MO_GP1_IO, 0x1010); in cx88_xc3028_winfast1800h_callback()
2842 cx_set(MO_GP1_IO, 0x10); in cx88_xc3028_winfast1800h_callback()
2989 cx_set(MO_GP0_IO, 0x00000010); in cx88_xc5000_tuner_callback()
3080 cx_set(MO_GP0_IO, 0x00000088); /* 702 out of reset */ in cx88_card_setup_pre_i2c()
3096 cx_set(MO_GP0_IO, 0x00001010); in cx88_card_setup_pre_i2c()
3106 cx_set(MO_GP0_IO, 0x00000080); /* 702 out of reset */ in cx88_card_setup_pre_i2c()
[all …]
Dcx88-mpeg.c174 cx_set(MO_PCI_INTMSK, core->pci_irqmask | PCI_INT_TSINT); in cx8802_start_dma()
175 cx_set(MO_TS_INTMSK, 0x1f0011); in cx8802_start_dma()
178 cx_set(MO_DEV_CNTRL2, (1<<5)); in cx8802_start_dma()
179 cx_set(MO_TS_DMACNTRL, 0x11); in cx8802_start_dma()
504 cx_set(MO_PCI_INTMSK, core->pci_irqmask); in cx8802_init_common()
Dcx88-video.c407 cx_set(MO_AFECFG_IO, 0x00000001); in cx88_video_mux()
408 cx_set(MO_INPUT_FORMAT, 0x00010010); in cx88_video_mux()
409 cx_set(MO_FILTER_EVEN, 0x00002020); in cx88_video_mux()
410 cx_set(MO_FILTER_ODD, 0x00002020); in cx88_video_mux()
469 cx_set(MO_PCI_INTMSK, core->pci_irqmask | PCI_INT_VIDINT); in start_video_dma()
478 cx_set(MO_VID_INTMSK, 0x0f0011); in start_video_dma()
481 cx_set(VID_CAPTURE_CONTROL,0x06); in start_video_dma()
484 cx_set(MO_DEV_CNTRL2, (1<<5)); in start_video_dma()
485 cx_set(MO_VID_DMACNTRL, 0x11); /* Planar Y and packed FIFO and RISC enable */ in start_video_dma()
1884 cx_set(MO_PCI_INTMSK, core->pci_irqmask); in cx8800_initdev()
[all …]
Dcx88-alsa.c162 cx_set(MO_PCI_INTMSK, chip->core->pci_irqmask | PCI_INT_AUDINT); in _cx88_start_audio_dma()
165 cx_set(MO_DEV_CNTRL2, (1<<5)); /* Enables Risc Processor */ in _cx88_start_audio_dma()
166 cx_set(MO_AUD_DMACNTRL, 0x11); /* audio downstream FIFO and RISC enable */ in _cx88_start_audio_dma()
Dcx88-blackbird.c1235 cx_set(MO_GP0_IO, 0x00000080); in cx8802_blackbird_advise_acquire()
1239 cx_set(MO_GP0_IO, 0x00000080); in cx8802_blackbird_advise_acquire()
1242 cx_set(MO_GP0_IO, 0x00000004); in cx8802_blackbird_advise_acquire()
Dcx88.h578 #define cx_set(reg,bit) cx_andor((reg),(bit),(bit)) macro
Dcx88-tvaudio.c149 cx_set(AUD_CTL, EN_I2SOUT_ENABLE); in set_audio_finish()
/linux-2.6.39/drivers/staging/cx25821/
Dcx25821-alsa.c199 cx_set(PCI_INT_MSK, chip->dev->pci_irqmask | PCI_MSK_AUD_INT); in _cx25821_start_audio_dma()
203 cx_set(AUD_INT_DMA_CTL, in _cx25821_start_audio_dma()
Dcx25821-audio-upstream.c687 cx_set(PCI_INT_MSK, cx_read(PCI_INT_MSK) | (1 << sram_ch->irq_bit)); in cx25821_start_audio_dma_upstream()
702 cx_set(sram_ch->dma_ctl, tmp | sram_ch->fld_aud_risc_en); in cx25821_start_audio_dma_upstream()
Dcx25821-video-upstream-ch2.c701 cx_set(PCI_INT_MSK, cx_read(PCI_INT_MSK) | (1 << sram_ch->irq_bit)); in cx25821_start_video_dma_upstream_ch2()
715 cx_set(sram_ch->dma_ctl, tmp | FLD_VID_RISC_EN); in cx25821_start_video_dma_upstream_ch2()
Dcx25821-video-upstream.c750 cx_set(PCI_INT_MSK, cx_read(PCI_INT_MSK) | (1 << sram_ch->irq_bit)); in cx25821_start_video_dma_upstream()
765 cx_set(sram_ch->dma_ctl, tmp | FLD_VID_RISC_EN); in cx25821_start_video_dma_upstream()
Dcx25821.h517 #define cx_set(reg, bit) cx_andor((reg), (bit), (bit)) macro
Dcx25821-video.c300 cx_set(PCI_INT_MSK, cx_read(PCI_INT_MSK) | (1 << channel->i)); in cx25821_start_video_dma()
301 cx_set(channel->int_msk, 0x11); in cx25821_start_video_dma()
524 cx_set(PCI_INT_MSK, 0xff); in cx25821_video_register()