1 /*
2 * Copyright 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright © 2006-2007 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23 * DEALINGS IN THE SOFTWARE.
24 *
25 * Authors:
26 * Eric Anholt <eric@anholt.net>
27 */
28 #include <linux/i2c.h>
29 #include <linux/slab.h>
30 #include <linux/delay.h>
31 #include "drmP.h"
32 #include "drm.h"
33 #include "drm_crtc.h"
34 #include "drm_edid.h"
35 #include "intel_drv.h"
36 #include "i915_drm.h"
37 #include "i915_drv.h"
38 #include "intel_sdvo_regs.h"
39
40 #define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
41 #define SDVO_RGB_MASK (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
42 #define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
43 #define SDVO_TV_MASK (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0)
44
45 #define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
46 SDVO_TV_MASK)
47
48 #define IS_TV(c) (c->output_flag & SDVO_TV_MASK)
49 #define IS_TMDS(c) (c->output_flag & SDVO_TMDS_MASK)
50 #define IS_LVDS(c) (c->output_flag & SDVO_LVDS_MASK)
51 #define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
52
53
54 static const char *tv_format_names[] = {
55 "NTSC_M" , "NTSC_J" , "NTSC_443",
56 "PAL_B" , "PAL_D" , "PAL_G" ,
57 "PAL_H" , "PAL_I" , "PAL_M" ,
58 "PAL_N" , "PAL_NC" , "PAL_60" ,
59 "SECAM_B" , "SECAM_D" , "SECAM_G" ,
60 "SECAM_K" , "SECAM_K1", "SECAM_L" ,
61 "SECAM_60"
62 };
63
64 #define TV_FORMAT_NUM (sizeof(tv_format_names) / sizeof(*tv_format_names))
65
66 struct intel_sdvo {
67 struct intel_encoder base;
68
69 struct i2c_adapter *i2c;
70 u8 slave_addr;
71
72 struct i2c_adapter ddc;
73
74 /* Register for the SDVO device: SDVOB or SDVOC */
75 int sdvo_reg;
76
77 /* Active outputs controlled by this SDVO output */
78 uint16_t controlled_output;
79
80 /*
81 * Capabilities of the SDVO device returned by
82 * i830_sdvo_get_capabilities()
83 */
84 struct intel_sdvo_caps caps;
85
86 /* Pixel clock limitations reported by the SDVO device, in kHz */
87 int pixel_clock_min, pixel_clock_max;
88
89 /*
90 * For multiple function SDVO device,
91 * this is for current attached outputs.
92 */
93 uint16_t attached_output;
94
95 /**
96 * This is used to select the color range of RBG outputs in HDMI mode.
97 * It is only valid when using TMDS encoding and 8 bit per color mode.
98 */
99 uint32_t color_range;
100
101 /**
102 * This is set if we're going to treat the device as TV-out.
103 *
104 * While we have these nice friendly flags for output types that ought
105 * to decide this for us, the S-Video output on our HDMI+S-Video card
106 * shows up as RGB1 (VGA).
107 */
108 bool is_tv;
109
110 /* This is for current tv format name */
111 int tv_format_index;
112
113 /**
114 * This is set if we treat the device as HDMI, instead of DVI.
115 */
116 bool is_hdmi;
117 bool has_hdmi_monitor;
118 bool has_hdmi_audio;
119
120 /**
121 * This is set if we detect output of sdvo device as LVDS and
122 * have a valid fixed mode to use with the panel.
123 */
124 bool is_lvds;
125
126 /**
127 * This is sdvo fixed pannel mode pointer
128 */
129 struct drm_display_mode *sdvo_lvds_fixed_mode;
130
131 /* DDC bus used by this SDVO encoder */
132 uint8_t ddc_bus;
133
134 /* Input timings for adjusted_mode */
135 struct intel_sdvo_dtd input_dtd;
136 };
137
138 struct intel_sdvo_connector {
139 struct intel_connector base;
140
141 /* Mark the type of connector */
142 uint16_t output_flag;
143
144 int force_audio;
145
146 /* This contains all current supported TV format */
147 u8 tv_format_supported[TV_FORMAT_NUM];
148 int format_supported_num;
149 struct drm_property *tv_format;
150
151 struct drm_property *force_audio_property;
152
153 /* add the property for the SDVO-TV */
154 struct drm_property *left;
155 struct drm_property *right;
156 struct drm_property *top;
157 struct drm_property *bottom;
158 struct drm_property *hpos;
159 struct drm_property *vpos;
160 struct drm_property *contrast;
161 struct drm_property *saturation;
162 struct drm_property *hue;
163 struct drm_property *sharpness;
164 struct drm_property *flicker_filter;
165 struct drm_property *flicker_filter_adaptive;
166 struct drm_property *flicker_filter_2d;
167 struct drm_property *tv_chroma_filter;
168 struct drm_property *tv_luma_filter;
169 struct drm_property *dot_crawl;
170
171 /* add the property for the SDVO-TV/LVDS */
172 struct drm_property *brightness;
173
174 /* Add variable to record current setting for the above property */
175 u32 left_margin, right_margin, top_margin, bottom_margin;
176
177 /* this is to get the range of margin.*/
178 u32 max_hscan, max_vscan;
179 u32 max_hpos, cur_hpos;
180 u32 max_vpos, cur_vpos;
181 u32 cur_brightness, max_brightness;
182 u32 cur_contrast, max_contrast;
183 u32 cur_saturation, max_saturation;
184 u32 cur_hue, max_hue;
185 u32 cur_sharpness, max_sharpness;
186 u32 cur_flicker_filter, max_flicker_filter;
187 u32 cur_flicker_filter_adaptive, max_flicker_filter_adaptive;
188 u32 cur_flicker_filter_2d, max_flicker_filter_2d;
189 u32 cur_tv_chroma_filter, max_tv_chroma_filter;
190 u32 cur_tv_luma_filter, max_tv_luma_filter;
191 u32 cur_dot_crawl, max_dot_crawl;
192 };
193
to_intel_sdvo(struct drm_encoder * encoder)194 static struct intel_sdvo *to_intel_sdvo(struct drm_encoder *encoder)
195 {
196 return container_of(encoder, struct intel_sdvo, base.base);
197 }
198
intel_attached_sdvo(struct drm_connector * connector)199 static struct intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
200 {
201 return container_of(intel_attached_encoder(connector),
202 struct intel_sdvo, base);
203 }
204
to_intel_sdvo_connector(struct drm_connector * connector)205 static struct intel_sdvo_connector *to_intel_sdvo_connector(struct drm_connector *connector)
206 {
207 return container_of(to_intel_connector(connector), struct intel_sdvo_connector, base);
208 }
209
210 static bool
211 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags);
212 static bool
213 intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
214 struct intel_sdvo_connector *intel_sdvo_connector,
215 int type);
216 static bool
217 intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
218 struct intel_sdvo_connector *intel_sdvo_connector);
219
220 /**
221 * Writes the SDVOB or SDVOC with the given value, but always writes both
222 * SDVOB and SDVOC to work around apparent hardware issues (according to
223 * comments in the BIOS).
224 */
intel_sdvo_write_sdvox(struct intel_sdvo * intel_sdvo,u32 val)225 static void intel_sdvo_write_sdvox(struct intel_sdvo *intel_sdvo, u32 val)
226 {
227 struct drm_device *dev = intel_sdvo->base.base.dev;
228 struct drm_i915_private *dev_priv = dev->dev_private;
229 u32 bval = val, cval = val;
230 int i;
231
232 if (intel_sdvo->sdvo_reg == PCH_SDVOB) {
233 I915_WRITE(intel_sdvo->sdvo_reg, val);
234 I915_READ(intel_sdvo->sdvo_reg);
235 return;
236 }
237
238 if (intel_sdvo->sdvo_reg == SDVOB) {
239 cval = I915_READ(SDVOC);
240 } else {
241 bval = I915_READ(SDVOB);
242 }
243 /*
244 * Write the registers twice for luck. Sometimes,
245 * writing them only once doesn't appear to 'stick'.
246 * The BIOS does this too. Yay, magic
247 */
248 for (i = 0; i < 2; i++)
249 {
250 I915_WRITE(SDVOB, bval);
251 I915_READ(SDVOB);
252 I915_WRITE(SDVOC, cval);
253 I915_READ(SDVOC);
254 }
255 }
256
intel_sdvo_read_byte(struct intel_sdvo * intel_sdvo,u8 addr,u8 * ch)257 static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch)
258 {
259 struct i2c_msg msgs[] = {
260 {
261 .addr = intel_sdvo->slave_addr,
262 .flags = 0,
263 .len = 1,
264 .buf = &addr,
265 },
266 {
267 .addr = intel_sdvo->slave_addr,
268 .flags = I2C_M_RD,
269 .len = 1,
270 .buf = ch,
271 }
272 };
273 int ret;
274
275 if ((ret = i2c_transfer(intel_sdvo->i2c, msgs, 2)) == 2)
276 return true;
277
278 DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
279 return false;
280 }
281
282 #define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
283 /** Mapping of command numbers to names, for debug output */
284 static const struct _sdvo_cmd_name {
285 u8 cmd;
286 const char *name;
287 } sdvo_cmd_names[] = {
288 SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
289 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
290 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
291 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
292 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
293 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
294 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
295 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
296 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
297 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
298 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
299 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
300 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
301 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
302 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
303 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
304 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
305 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
306 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
307 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
308 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
309 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
310 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
311 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
312 SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
313 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
314 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
315 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
316 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
317 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
318 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
319 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
320 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
321 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
322 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
323 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
324 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
325 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
326 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
327 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
328 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
329 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
330 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
331
332 /* Add the op code for SDVO enhancements */
333 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS),
334 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS),
335 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS),
336 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS),
337 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS),
338 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS),
339 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
340 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
341 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
342 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
343 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
344 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
345 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
346 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
347 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
348 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
349 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
350 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
351 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
352 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
353 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
354 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
355 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
356 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
357 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER),
358 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER),
359 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER),
360 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE),
361 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE),
362 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE),
363 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D),
364 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D),
365 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D),
366 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS),
367 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS),
368 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS),
369 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL),
370 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL),
371 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER),
372 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER),
373 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER),
374 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER),
375 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER),
376 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER),
377
378 /* HDMI op code */
379 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
380 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
381 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
382 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
383 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
384 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
385 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
386 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
387 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
388 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
389 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
390 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
391 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
392 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
393 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
394 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
395 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
396 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
397 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
398 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
399 };
400
401 #define IS_SDVOB(reg) (reg == SDVOB || reg == PCH_SDVOB)
402 #define SDVO_NAME(svdo) (IS_SDVOB((svdo)->sdvo_reg) ? "SDVOB" : "SDVOC")
403
intel_sdvo_debug_write(struct intel_sdvo * intel_sdvo,u8 cmd,const void * args,int args_len)404 static void intel_sdvo_debug_write(struct intel_sdvo *intel_sdvo, u8 cmd,
405 const void *args, int args_len)
406 {
407 int i;
408
409 DRM_DEBUG_KMS("%s: W: %02X ",
410 SDVO_NAME(intel_sdvo), cmd);
411 for (i = 0; i < args_len; i++)
412 DRM_LOG_KMS("%02X ", ((u8 *)args)[i]);
413 for (; i < 8; i++)
414 DRM_LOG_KMS(" ");
415 for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
416 if (cmd == sdvo_cmd_names[i].cmd) {
417 DRM_LOG_KMS("(%s)", sdvo_cmd_names[i].name);
418 break;
419 }
420 }
421 if (i == ARRAY_SIZE(sdvo_cmd_names))
422 DRM_LOG_KMS("(%02X)", cmd);
423 DRM_LOG_KMS("\n");
424 }
425
426 static const char *cmd_status_names[] = {
427 "Power on",
428 "Success",
429 "Not supported",
430 "Invalid arg",
431 "Pending",
432 "Target not specified",
433 "Scaling not supported"
434 };
435
intel_sdvo_write_cmd(struct intel_sdvo * intel_sdvo,u8 cmd,const void * args,int args_len)436 static bool intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd,
437 const void *args, int args_len)
438 {
439 u8 buf[args_len*2 + 2], status;
440 struct i2c_msg msgs[args_len + 3];
441 int i, ret;
442
443 intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len);
444
445 for (i = 0; i < args_len; i++) {
446 msgs[i].addr = intel_sdvo->slave_addr;
447 msgs[i].flags = 0;
448 msgs[i].len = 2;
449 msgs[i].buf = buf + 2 *i;
450 buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
451 buf[2*i + 1] = ((u8*)args)[i];
452 }
453 msgs[i].addr = intel_sdvo->slave_addr;
454 msgs[i].flags = 0;
455 msgs[i].len = 2;
456 msgs[i].buf = buf + 2*i;
457 buf[2*i + 0] = SDVO_I2C_OPCODE;
458 buf[2*i + 1] = cmd;
459
460 /* the following two are to read the response */
461 status = SDVO_I2C_CMD_STATUS;
462 msgs[i+1].addr = intel_sdvo->slave_addr;
463 msgs[i+1].flags = 0;
464 msgs[i+1].len = 1;
465 msgs[i+1].buf = &status;
466
467 msgs[i+2].addr = intel_sdvo->slave_addr;
468 msgs[i+2].flags = I2C_M_RD;
469 msgs[i+2].len = 1;
470 msgs[i+2].buf = &status;
471
472 ret = i2c_transfer(intel_sdvo->i2c, msgs, i+3);
473 if (ret < 0) {
474 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
475 return false;
476 }
477 if (ret != i+3) {
478 /* failure in I2C transfer */
479 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
480 return false;
481 }
482
483 return true;
484 }
485
intel_sdvo_read_response(struct intel_sdvo * intel_sdvo,void * response,int response_len)486 static bool intel_sdvo_read_response(struct intel_sdvo *intel_sdvo,
487 void *response, int response_len)
488 {
489 u8 retry = 5;
490 u8 status;
491 int i;
492
493 DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(intel_sdvo));
494
495 /*
496 * The documentation states that all commands will be
497 * processed within 15µs, and that we need only poll
498 * the status byte a maximum of 3 times in order for the
499 * command to be complete.
500 *
501 * Check 5 times in case the hardware failed to read the docs.
502 */
503 if (!intel_sdvo_read_byte(intel_sdvo,
504 SDVO_I2C_CMD_STATUS,
505 &status))
506 goto log_fail;
507
508 while (status == SDVO_CMD_STATUS_PENDING && retry--) {
509 udelay(15);
510 if (!intel_sdvo_read_byte(intel_sdvo,
511 SDVO_I2C_CMD_STATUS,
512 &status))
513 goto log_fail;
514 }
515
516 if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
517 DRM_LOG_KMS("(%s)", cmd_status_names[status]);
518 else
519 DRM_LOG_KMS("(??? %d)", status);
520
521 if (status != SDVO_CMD_STATUS_SUCCESS)
522 goto log_fail;
523
524 /* Read the command response */
525 for (i = 0; i < response_len; i++) {
526 if (!intel_sdvo_read_byte(intel_sdvo,
527 SDVO_I2C_RETURN_0 + i,
528 &((u8 *)response)[i]))
529 goto log_fail;
530 DRM_LOG_KMS(" %02X", ((u8 *)response)[i]);
531 }
532 DRM_LOG_KMS("\n");
533 return true;
534
535 log_fail:
536 DRM_LOG_KMS("... failed\n");
537 return false;
538 }
539
intel_sdvo_get_pixel_multiplier(struct drm_display_mode * mode)540 static int intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode)
541 {
542 if (mode->clock >= 100000)
543 return 1;
544 else if (mode->clock >= 50000)
545 return 2;
546 else
547 return 4;
548 }
549
intel_sdvo_set_control_bus_switch(struct intel_sdvo * intel_sdvo,u8 ddc_bus)550 static bool intel_sdvo_set_control_bus_switch(struct intel_sdvo *intel_sdvo,
551 u8 ddc_bus)
552 {
553 /* This must be the immediately preceding write before the i2c xfer */
554 return intel_sdvo_write_cmd(intel_sdvo,
555 SDVO_CMD_SET_CONTROL_BUS_SWITCH,
556 &ddc_bus, 1);
557 }
558
intel_sdvo_set_value(struct intel_sdvo * intel_sdvo,u8 cmd,const void * data,int len)559 static bool intel_sdvo_set_value(struct intel_sdvo *intel_sdvo, u8 cmd, const void *data, int len)
560 {
561 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, data, len))
562 return false;
563
564 return intel_sdvo_read_response(intel_sdvo, NULL, 0);
565 }
566
567 static bool
intel_sdvo_get_value(struct intel_sdvo * intel_sdvo,u8 cmd,void * value,int len)568 intel_sdvo_get_value(struct intel_sdvo *intel_sdvo, u8 cmd, void *value, int len)
569 {
570 if (!intel_sdvo_write_cmd(intel_sdvo, cmd, NULL, 0))
571 return false;
572
573 return intel_sdvo_read_response(intel_sdvo, value, len);
574 }
575
intel_sdvo_set_target_input(struct intel_sdvo * intel_sdvo)576 static bool intel_sdvo_set_target_input(struct intel_sdvo *intel_sdvo)
577 {
578 struct intel_sdvo_set_target_input_args targets = {0};
579 return intel_sdvo_set_value(intel_sdvo,
580 SDVO_CMD_SET_TARGET_INPUT,
581 &targets, sizeof(targets));
582 }
583
584 /**
585 * Return whether each input is trained.
586 *
587 * This function is making an assumption about the layout of the response,
588 * which should be checked against the docs.
589 */
intel_sdvo_get_trained_inputs(struct intel_sdvo * intel_sdvo,bool * input_1,bool * input_2)590 static bool intel_sdvo_get_trained_inputs(struct intel_sdvo *intel_sdvo, bool *input_1, bool *input_2)
591 {
592 struct intel_sdvo_get_trained_inputs_response response;
593
594 BUILD_BUG_ON(sizeof(response) != 1);
595 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
596 &response, sizeof(response)))
597 return false;
598
599 *input_1 = response.input0_trained;
600 *input_2 = response.input1_trained;
601 return true;
602 }
603
intel_sdvo_set_active_outputs(struct intel_sdvo * intel_sdvo,u16 outputs)604 static bool intel_sdvo_set_active_outputs(struct intel_sdvo *intel_sdvo,
605 u16 outputs)
606 {
607 return intel_sdvo_set_value(intel_sdvo,
608 SDVO_CMD_SET_ACTIVE_OUTPUTS,
609 &outputs, sizeof(outputs));
610 }
611
intel_sdvo_set_encoder_power_state(struct intel_sdvo * intel_sdvo,int mode)612 static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo,
613 int mode)
614 {
615 u8 state = SDVO_ENCODER_STATE_ON;
616
617 switch (mode) {
618 case DRM_MODE_DPMS_ON:
619 state = SDVO_ENCODER_STATE_ON;
620 break;
621 case DRM_MODE_DPMS_STANDBY:
622 state = SDVO_ENCODER_STATE_STANDBY;
623 break;
624 case DRM_MODE_DPMS_SUSPEND:
625 state = SDVO_ENCODER_STATE_SUSPEND;
626 break;
627 case DRM_MODE_DPMS_OFF:
628 state = SDVO_ENCODER_STATE_OFF;
629 break;
630 }
631
632 return intel_sdvo_set_value(intel_sdvo,
633 SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
634 }
635
intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo * intel_sdvo,int * clock_min,int * clock_max)636 static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo,
637 int *clock_min,
638 int *clock_max)
639 {
640 struct intel_sdvo_pixel_clock_range clocks;
641
642 BUILD_BUG_ON(sizeof(clocks) != 4);
643 if (!intel_sdvo_get_value(intel_sdvo,
644 SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
645 &clocks, sizeof(clocks)))
646 return false;
647
648 /* Convert the values from units of 10 kHz to kHz. */
649 *clock_min = clocks.min * 10;
650 *clock_max = clocks.max * 10;
651 return true;
652 }
653
intel_sdvo_set_target_output(struct intel_sdvo * intel_sdvo,u16 outputs)654 static bool intel_sdvo_set_target_output(struct intel_sdvo *intel_sdvo,
655 u16 outputs)
656 {
657 return intel_sdvo_set_value(intel_sdvo,
658 SDVO_CMD_SET_TARGET_OUTPUT,
659 &outputs, sizeof(outputs));
660 }
661
intel_sdvo_set_timing(struct intel_sdvo * intel_sdvo,u8 cmd,struct intel_sdvo_dtd * dtd)662 static bool intel_sdvo_set_timing(struct intel_sdvo *intel_sdvo, u8 cmd,
663 struct intel_sdvo_dtd *dtd)
664 {
665 return intel_sdvo_set_value(intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
666 intel_sdvo_set_value(intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
667 }
668
intel_sdvo_set_input_timing(struct intel_sdvo * intel_sdvo,struct intel_sdvo_dtd * dtd)669 static bool intel_sdvo_set_input_timing(struct intel_sdvo *intel_sdvo,
670 struct intel_sdvo_dtd *dtd)
671 {
672 return intel_sdvo_set_timing(intel_sdvo,
673 SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
674 }
675
intel_sdvo_set_output_timing(struct intel_sdvo * intel_sdvo,struct intel_sdvo_dtd * dtd)676 static bool intel_sdvo_set_output_timing(struct intel_sdvo *intel_sdvo,
677 struct intel_sdvo_dtd *dtd)
678 {
679 return intel_sdvo_set_timing(intel_sdvo,
680 SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
681 }
682
683 static bool
intel_sdvo_create_preferred_input_timing(struct intel_sdvo * intel_sdvo,uint16_t clock,uint16_t width,uint16_t height)684 intel_sdvo_create_preferred_input_timing(struct intel_sdvo *intel_sdvo,
685 uint16_t clock,
686 uint16_t width,
687 uint16_t height)
688 {
689 struct intel_sdvo_preferred_input_timing_args args;
690
691 memset(&args, 0, sizeof(args));
692 args.clock = clock;
693 args.width = width;
694 args.height = height;
695 args.interlace = 0;
696
697 if (intel_sdvo->is_lvds &&
698 (intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width ||
699 intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height))
700 args.scaled = 1;
701
702 return intel_sdvo_set_value(intel_sdvo,
703 SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
704 &args, sizeof(args));
705 }
706
intel_sdvo_get_preferred_input_timing(struct intel_sdvo * intel_sdvo,struct intel_sdvo_dtd * dtd)707 static bool intel_sdvo_get_preferred_input_timing(struct intel_sdvo *intel_sdvo,
708 struct intel_sdvo_dtd *dtd)
709 {
710 BUILD_BUG_ON(sizeof(dtd->part1) != 8);
711 BUILD_BUG_ON(sizeof(dtd->part2) != 8);
712 return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
713 &dtd->part1, sizeof(dtd->part1)) &&
714 intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
715 &dtd->part2, sizeof(dtd->part2));
716 }
717
intel_sdvo_set_clock_rate_mult(struct intel_sdvo * intel_sdvo,u8 val)718 static bool intel_sdvo_set_clock_rate_mult(struct intel_sdvo *intel_sdvo, u8 val)
719 {
720 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
721 }
722
intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd * dtd,const struct drm_display_mode * mode)723 static void intel_sdvo_get_dtd_from_mode(struct intel_sdvo_dtd *dtd,
724 const struct drm_display_mode *mode)
725 {
726 uint16_t width, height;
727 uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
728 uint16_t h_sync_offset, v_sync_offset;
729
730 width = mode->crtc_hdisplay;
731 height = mode->crtc_vdisplay;
732
733 /* do some mode translations */
734 h_blank_len = mode->crtc_hblank_end - mode->crtc_hblank_start;
735 h_sync_len = mode->crtc_hsync_end - mode->crtc_hsync_start;
736
737 v_blank_len = mode->crtc_vblank_end - mode->crtc_vblank_start;
738 v_sync_len = mode->crtc_vsync_end - mode->crtc_vsync_start;
739
740 h_sync_offset = mode->crtc_hsync_start - mode->crtc_hblank_start;
741 v_sync_offset = mode->crtc_vsync_start - mode->crtc_vblank_start;
742
743 dtd->part1.clock = mode->clock / 10;
744 dtd->part1.h_active = width & 0xff;
745 dtd->part1.h_blank = h_blank_len & 0xff;
746 dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
747 ((h_blank_len >> 8) & 0xf);
748 dtd->part1.v_active = height & 0xff;
749 dtd->part1.v_blank = v_blank_len & 0xff;
750 dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
751 ((v_blank_len >> 8) & 0xf);
752
753 dtd->part2.h_sync_off = h_sync_offset & 0xff;
754 dtd->part2.h_sync_width = h_sync_len & 0xff;
755 dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
756 (v_sync_len & 0xf);
757 dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
758 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
759 ((v_sync_len & 0x30) >> 4);
760
761 dtd->part2.dtd_flags = 0x18;
762 if (mode->flags & DRM_MODE_FLAG_PHSYNC)
763 dtd->part2.dtd_flags |= 0x2;
764 if (mode->flags & DRM_MODE_FLAG_PVSYNC)
765 dtd->part2.dtd_flags |= 0x4;
766
767 dtd->part2.sdvo_flags = 0;
768 dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
769 dtd->part2.reserved = 0;
770 }
771
intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode,const struct intel_sdvo_dtd * dtd)772 static void intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode,
773 const struct intel_sdvo_dtd *dtd)
774 {
775 mode->hdisplay = dtd->part1.h_active;
776 mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
777 mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off;
778 mode->hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
779 mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width;
780 mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
781 mode->htotal = mode->hdisplay + dtd->part1.h_blank;
782 mode->htotal += (dtd->part1.h_high & 0xf) << 8;
783
784 mode->vdisplay = dtd->part1.v_active;
785 mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
786 mode->vsync_start = mode->vdisplay;
787 mode->vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
788 mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
789 mode->vsync_start += dtd->part2.v_sync_off_high & 0xc0;
790 mode->vsync_end = mode->vsync_start +
791 (dtd->part2.v_sync_off_width & 0xf);
792 mode->vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
793 mode->vtotal = mode->vdisplay + dtd->part1.v_blank;
794 mode->vtotal += (dtd->part1.v_high & 0xf) << 8;
795
796 mode->clock = dtd->part1.clock * 10;
797
798 mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC);
799 if (dtd->part2.dtd_flags & 0x2)
800 mode->flags |= DRM_MODE_FLAG_PHSYNC;
801 if (dtd->part2.dtd_flags & 0x4)
802 mode->flags |= DRM_MODE_FLAG_PVSYNC;
803 }
804
intel_sdvo_check_supp_encode(struct intel_sdvo * intel_sdvo)805 static bool intel_sdvo_check_supp_encode(struct intel_sdvo *intel_sdvo)
806 {
807 struct intel_sdvo_encode encode;
808
809 BUILD_BUG_ON(sizeof(encode) != 2);
810 return intel_sdvo_get_value(intel_sdvo,
811 SDVO_CMD_GET_SUPP_ENCODE,
812 &encode, sizeof(encode));
813 }
814
intel_sdvo_set_encode(struct intel_sdvo * intel_sdvo,uint8_t mode)815 static bool intel_sdvo_set_encode(struct intel_sdvo *intel_sdvo,
816 uint8_t mode)
817 {
818 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
819 }
820
intel_sdvo_set_colorimetry(struct intel_sdvo * intel_sdvo,uint8_t mode)821 static bool intel_sdvo_set_colorimetry(struct intel_sdvo *intel_sdvo,
822 uint8_t mode)
823 {
824 return intel_sdvo_set_value(intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
825 }
826
827 #if 0
828 static void intel_sdvo_dump_hdmi_buf(struct intel_sdvo *intel_sdvo)
829 {
830 int i, j;
831 uint8_t set_buf_index[2];
832 uint8_t av_split;
833 uint8_t buf_size;
834 uint8_t buf[48];
835 uint8_t *pos;
836
837 intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
838
839 for (i = 0; i <= av_split; i++) {
840 set_buf_index[0] = i; set_buf_index[1] = 0;
841 intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
842 set_buf_index, 2);
843 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
844 intel_sdvo_read_response(encoder, &buf_size, 1);
845
846 pos = buf;
847 for (j = 0; j <= buf_size; j += 8) {
848 intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
849 NULL, 0);
850 intel_sdvo_read_response(encoder, pos, 8);
851 pos += 8;
852 }
853 }
854 }
855 #endif
856
intel_sdvo_set_avi_infoframe(struct intel_sdvo * intel_sdvo)857 static bool intel_sdvo_set_avi_infoframe(struct intel_sdvo *intel_sdvo)
858 {
859 struct dip_infoframe avi_if = {
860 .type = DIP_TYPE_AVI,
861 .ver = DIP_VERSION_AVI,
862 .len = DIP_LEN_AVI,
863 };
864 uint8_t tx_rate = SDVO_HBUF_TX_VSYNC;
865 uint8_t set_buf_index[2] = { 1, 0 };
866 uint64_t *data = (uint64_t *)&avi_if;
867 unsigned i;
868
869 intel_dip_infoframe_csum(&avi_if);
870
871 if (!intel_sdvo_set_value(intel_sdvo,
872 SDVO_CMD_SET_HBUF_INDEX,
873 set_buf_index, 2))
874 return false;
875
876 for (i = 0; i < sizeof(avi_if); i += 8) {
877 if (!intel_sdvo_set_value(intel_sdvo,
878 SDVO_CMD_SET_HBUF_DATA,
879 data, 8))
880 return false;
881 data++;
882 }
883
884 return intel_sdvo_set_value(intel_sdvo,
885 SDVO_CMD_SET_HBUF_TXRATE,
886 &tx_rate, 1);
887 }
888
intel_sdvo_set_tv_format(struct intel_sdvo * intel_sdvo)889 static bool intel_sdvo_set_tv_format(struct intel_sdvo *intel_sdvo)
890 {
891 struct intel_sdvo_tv_format format;
892 uint32_t format_map;
893
894 format_map = 1 << intel_sdvo->tv_format_index;
895 memset(&format, 0, sizeof(format));
896 memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
897
898 BUILD_BUG_ON(sizeof(format) != 6);
899 return intel_sdvo_set_value(intel_sdvo,
900 SDVO_CMD_SET_TV_FORMAT,
901 &format, sizeof(format));
902 }
903
904 static bool
intel_sdvo_set_output_timings_from_mode(struct intel_sdvo * intel_sdvo,struct drm_display_mode * mode)905 intel_sdvo_set_output_timings_from_mode(struct intel_sdvo *intel_sdvo,
906 struct drm_display_mode *mode)
907 {
908 struct intel_sdvo_dtd output_dtd;
909
910 if (!intel_sdvo_set_target_output(intel_sdvo,
911 intel_sdvo->attached_output))
912 return false;
913
914 intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
915 if (!intel_sdvo_set_output_timing(intel_sdvo, &output_dtd))
916 return false;
917
918 return true;
919 }
920
921 static bool
intel_sdvo_set_input_timings_for_mode(struct intel_sdvo * intel_sdvo,struct drm_display_mode * mode,struct drm_display_mode * adjusted_mode)922 intel_sdvo_set_input_timings_for_mode(struct intel_sdvo *intel_sdvo,
923 struct drm_display_mode *mode,
924 struct drm_display_mode *adjusted_mode)
925 {
926 /* Reset the input timing to the screen. Assume always input 0. */
927 if (!intel_sdvo_set_target_input(intel_sdvo))
928 return false;
929
930 if (!intel_sdvo_create_preferred_input_timing(intel_sdvo,
931 mode->clock / 10,
932 mode->hdisplay,
933 mode->vdisplay))
934 return false;
935
936 if (!intel_sdvo_get_preferred_input_timing(intel_sdvo,
937 &intel_sdvo->input_dtd))
938 return false;
939
940 intel_sdvo_get_mode_from_dtd(adjusted_mode, &intel_sdvo->input_dtd);
941
942 drm_mode_set_crtcinfo(adjusted_mode, 0);
943 return true;
944 }
945
intel_sdvo_mode_fixup(struct drm_encoder * encoder,struct drm_display_mode * mode,struct drm_display_mode * adjusted_mode)946 static bool intel_sdvo_mode_fixup(struct drm_encoder *encoder,
947 struct drm_display_mode *mode,
948 struct drm_display_mode *adjusted_mode)
949 {
950 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
951 int multiplier;
952
953 /* We need to construct preferred input timings based on our
954 * output timings. To do that, we have to set the output
955 * timings, even though this isn't really the right place in
956 * the sequence to do it. Oh well.
957 */
958 if (intel_sdvo->is_tv) {
959 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo, mode))
960 return false;
961
962 (void) intel_sdvo_set_input_timings_for_mode(intel_sdvo,
963 mode,
964 adjusted_mode);
965 } else if (intel_sdvo->is_lvds) {
966 if (!intel_sdvo_set_output_timings_from_mode(intel_sdvo,
967 intel_sdvo->sdvo_lvds_fixed_mode))
968 return false;
969
970 (void) intel_sdvo_set_input_timings_for_mode(intel_sdvo,
971 mode,
972 adjusted_mode);
973 }
974
975 /* Make the CRTC code factor in the SDVO pixel multiplier. The
976 * SDVO device will factor out the multiplier during mode_set.
977 */
978 multiplier = intel_sdvo_get_pixel_multiplier(adjusted_mode);
979 intel_mode_set_pixel_multiplier(adjusted_mode, multiplier);
980
981 return true;
982 }
983
intel_sdvo_mode_set(struct drm_encoder * encoder,struct drm_display_mode * mode,struct drm_display_mode * adjusted_mode)984 static void intel_sdvo_mode_set(struct drm_encoder *encoder,
985 struct drm_display_mode *mode,
986 struct drm_display_mode *adjusted_mode)
987 {
988 struct drm_device *dev = encoder->dev;
989 struct drm_i915_private *dev_priv = dev->dev_private;
990 struct drm_crtc *crtc = encoder->crtc;
991 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
992 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
993 u32 sdvox;
994 struct intel_sdvo_in_out_map in_out;
995 struct intel_sdvo_dtd input_dtd;
996 int pixel_multiplier = intel_mode_get_pixel_multiplier(adjusted_mode);
997 int rate;
998
999 if (!mode)
1000 return;
1001
1002 /* First, set the input mapping for the first input to our controlled
1003 * output. This is only correct if we're a single-input device, in
1004 * which case the first input is the output from the appropriate SDVO
1005 * channel on the motherboard. In a two-input device, the first input
1006 * will be SDVOB and the second SDVOC.
1007 */
1008 in_out.in0 = intel_sdvo->attached_output;
1009 in_out.in1 = 0;
1010
1011 intel_sdvo_set_value(intel_sdvo,
1012 SDVO_CMD_SET_IN_OUT_MAP,
1013 &in_out, sizeof(in_out));
1014
1015 /* Set the output timings to the screen */
1016 if (!intel_sdvo_set_target_output(intel_sdvo,
1017 intel_sdvo->attached_output))
1018 return;
1019
1020 /* We have tried to get input timing in mode_fixup, and filled into
1021 * adjusted_mode.
1022 */
1023 if (intel_sdvo->is_tv || intel_sdvo->is_lvds) {
1024 input_dtd = intel_sdvo->input_dtd;
1025 } else {
1026 /* Set the output timing to the screen */
1027 if (!intel_sdvo_set_target_output(intel_sdvo,
1028 intel_sdvo->attached_output))
1029 return;
1030
1031 intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
1032 (void) intel_sdvo_set_output_timing(intel_sdvo, &input_dtd);
1033 }
1034
1035 /* Set the input timing to the screen. Assume always input 0. */
1036 if (!intel_sdvo_set_target_input(intel_sdvo))
1037 return;
1038
1039 if (intel_sdvo->has_hdmi_monitor) {
1040 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_HDMI);
1041 intel_sdvo_set_colorimetry(intel_sdvo,
1042 SDVO_COLORIMETRY_RGB256);
1043 intel_sdvo_set_avi_infoframe(intel_sdvo);
1044 } else
1045 intel_sdvo_set_encode(intel_sdvo, SDVO_ENCODE_DVI);
1046
1047 if (intel_sdvo->is_tv &&
1048 !intel_sdvo_set_tv_format(intel_sdvo))
1049 return;
1050
1051 (void) intel_sdvo_set_input_timing(intel_sdvo, &input_dtd);
1052
1053 switch (pixel_multiplier) {
1054 default:
1055 case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
1056 case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
1057 case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
1058 }
1059 if (!intel_sdvo_set_clock_rate_mult(intel_sdvo, rate))
1060 return;
1061
1062 /* Set the SDVO control regs. */
1063 if (INTEL_INFO(dev)->gen >= 4) {
1064 sdvox = 0;
1065 if (intel_sdvo->is_hdmi)
1066 sdvox |= intel_sdvo->color_range;
1067 if (INTEL_INFO(dev)->gen < 5)
1068 sdvox |= SDVO_BORDER_ENABLE;
1069 if (adjusted_mode->flags & DRM_MODE_FLAG_PVSYNC)
1070 sdvox |= SDVO_VSYNC_ACTIVE_HIGH;
1071 if (adjusted_mode->flags & DRM_MODE_FLAG_PHSYNC)
1072 sdvox |= SDVO_HSYNC_ACTIVE_HIGH;
1073 } else {
1074 sdvox = I915_READ(intel_sdvo->sdvo_reg);
1075 switch (intel_sdvo->sdvo_reg) {
1076 case SDVOB:
1077 sdvox &= SDVOB_PRESERVE_MASK;
1078 break;
1079 case SDVOC:
1080 sdvox &= SDVOC_PRESERVE_MASK;
1081 break;
1082 }
1083 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
1084 }
1085 if (intel_crtc->pipe == 1)
1086 sdvox |= SDVO_PIPE_B_SELECT;
1087 if (intel_sdvo->has_hdmi_audio)
1088 sdvox |= SDVO_AUDIO_ENABLE;
1089
1090 if (INTEL_INFO(dev)->gen >= 4) {
1091 /* done in crtc_mode_set as the dpll_md reg must be written early */
1092 } else if (IS_I945G(dev) || IS_I945GM(dev) || IS_G33(dev)) {
1093 /* done in crtc_mode_set as it lives inside the dpll register */
1094 } else {
1095 sdvox |= (pixel_multiplier - 1) << SDVO_PORT_MULTIPLY_SHIFT;
1096 }
1097
1098 if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL &&
1099 INTEL_INFO(dev)->gen < 5)
1100 sdvox |= SDVO_STALL_SELECT;
1101 intel_sdvo_write_sdvox(intel_sdvo, sdvox);
1102 }
1103
intel_sdvo_dpms(struct drm_encoder * encoder,int mode)1104 static void intel_sdvo_dpms(struct drm_encoder *encoder, int mode)
1105 {
1106 struct drm_device *dev = encoder->dev;
1107 struct drm_i915_private *dev_priv = dev->dev_private;
1108 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
1109 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc);
1110 u32 temp;
1111
1112 if (mode != DRM_MODE_DPMS_ON) {
1113 intel_sdvo_set_active_outputs(intel_sdvo, 0);
1114 if (0)
1115 intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1116
1117 if (mode == DRM_MODE_DPMS_OFF) {
1118 temp = I915_READ(intel_sdvo->sdvo_reg);
1119 if ((temp & SDVO_ENABLE) != 0) {
1120 intel_sdvo_write_sdvox(intel_sdvo, temp & ~SDVO_ENABLE);
1121 }
1122 }
1123 } else {
1124 bool input1, input2;
1125 int i;
1126 u8 status;
1127
1128 temp = I915_READ(intel_sdvo->sdvo_reg);
1129 if ((temp & SDVO_ENABLE) == 0)
1130 intel_sdvo_write_sdvox(intel_sdvo, temp | SDVO_ENABLE);
1131 for (i = 0; i < 2; i++)
1132 intel_wait_for_vblank(dev, intel_crtc->pipe);
1133
1134 status = intel_sdvo_get_trained_inputs(intel_sdvo, &input1, &input2);
1135 /* Warn if the device reported failure to sync.
1136 * A lot of SDVO devices fail to notify of sync, but it's
1137 * a given it the status is a success, we succeeded.
1138 */
1139 if (status == SDVO_CMD_STATUS_SUCCESS && !input1) {
1140 DRM_DEBUG_KMS("First %s output reported failure to "
1141 "sync\n", SDVO_NAME(intel_sdvo));
1142 }
1143
1144 if (0)
1145 intel_sdvo_set_encoder_power_state(intel_sdvo, mode);
1146 intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output);
1147 }
1148 return;
1149 }
1150
intel_sdvo_mode_valid(struct drm_connector * connector,struct drm_display_mode * mode)1151 static int intel_sdvo_mode_valid(struct drm_connector *connector,
1152 struct drm_display_mode *mode)
1153 {
1154 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1155
1156 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
1157 return MODE_NO_DBLESCAN;
1158
1159 if (intel_sdvo->pixel_clock_min > mode->clock)
1160 return MODE_CLOCK_LOW;
1161
1162 if (intel_sdvo->pixel_clock_max < mode->clock)
1163 return MODE_CLOCK_HIGH;
1164
1165 if (intel_sdvo->is_lvds) {
1166 if (mode->hdisplay > intel_sdvo->sdvo_lvds_fixed_mode->hdisplay)
1167 return MODE_PANEL;
1168
1169 if (mode->vdisplay > intel_sdvo->sdvo_lvds_fixed_mode->vdisplay)
1170 return MODE_PANEL;
1171 }
1172
1173 return MODE_OK;
1174 }
1175
intel_sdvo_get_capabilities(struct intel_sdvo * intel_sdvo,struct intel_sdvo_caps * caps)1176 static bool intel_sdvo_get_capabilities(struct intel_sdvo *intel_sdvo, struct intel_sdvo_caps *caps)
1177 {
1178 BUILD_BUG_ON(sizeof(*caps) != 8);
1179 if (!intel_sdvo_get_value(intel_sdvo,
1180 SDVO_CMD_GET_DEVICE_CAPS,
1181 caps, sizeof(*caps)))
1182 return false;
1183
1184 DRM_DEBUG_KMS("SDVO capabilities:\n"
1185 " vendor_id: %d\n"
1186 " device_id: %d\n"
1187 " device_rev_id: %d\n"
1188 " sdvo_version_major: %d\n"
1189 " sdvo_version_minor: %d\n"
1190 " sdvo_inputs_mask: %d\n"
1191 " smooth_scaling: %d\n"
1192 " sharp_scaling: %d\n"
1193 " up_scaling: %d\n"
1194 " down_scaling: %d\n"
1195 " stall_support: %d\n"
1196 " output_flags: %d\n",
1197 caps->vendor_id,
1198 caps->device_id,
1199 caps->device_rev_id,
1200 caps->sdvo_version_major,
1201 caps->sdvo_version_minor,
1202 caps->sdvo_inputs_mask,
1203 caps->smooth_scaling,
1204 caps->sharp_scaling,
1205 caps->up_scaling,
1206 caps->down_scaling,
1207 caps->stall_support,
1208 caps->output_flags);
1209
1210 return true;
1211 }
1212
1213 /* No use! */
1214 #if 0
1215 struct drm_connector* intel_sdvo_find(struct drm_device *dev, int sdvoB)
1216 {
1217 struct drm_connector *connector = NULL;
1218 struct intel_sdvo *iout = NULL;
1219 struct intel_sdvo *sdvo;
1220
1221 /* find the sdvo connector */
1222 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
1223 iout = to_intel_sdvo(connector);
1224
1225 if (iout->type != INTEL_OUTPUT_SDVO)
1226 continue;
1227
1228 sdvo = iout->dev_priv;
1229
1230 if (sdvo->sdvo_reg == SDVOB && sdvoB)
1231 return connector;
1232
1233 if (sdvo->sdvo_reg == SDVOC && !sdvoB)
1234 return connector;
1235
1236 }
1237
1238 return NULL;
1239 }
1240
1241 int intel_sdvo_supports_hotplug(struct drm_connector *connector)
1242 {
1243 u8 response[2];
1244 u8 status;
1245 struct intel_sdvo *intel_sdvo;
1246 DRM_DEBUG_KMS("\n");
1247
1248 if (!connector)
1249 return 0;
1250
1251 intel_sdvo = to_intel_sdvo(connector);
1252
1253 return intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
1254 &response, 2) && response[0];
1255 }
1256
1257 void intel_sdvo_set_hotplug(struct drm_connector *connector, int on)
1258 {
1259 u8 response[2];
1260 u8 status;
1261 struct intel_sdvo *intel_sdvo = to_intel_sdvo(connector);
1262
1263 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_ACTIVE_HOT_PLUG, NULL, 0);
1264 intel_sdvo_read_response(intel_sdvo, &response, 2);
1265
1266 if (on) {
1267 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT, NULL, 0);
1268 status = intel_sdvo_read_response(intel_sdvo, &response, 2);
1269
1270 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, &response, 2);
1271 } else {
1272 response[0] = 0;
1273 response[1] = 0;
1274 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, &response, 2);
1275 }
1276
1277 intel_sdvo_write_cmd(intel_sdvo, SDVO_CMD_GET_ACTIVE_HOT_PLUG, NULL, 0);
1278 intel_sdvo_read_response(intel_sdvo, &response, 2);
1279 }
1280 #endif
1281
1282 static bool
intel_sdvo_multifunc_encoder(struct intel_sdvo * intel_sdvo)1283 intel_sdvo_multifunc_encoder(struct intel_sdvo *intel_sdvo)
1284 {
1285 /* Is there more than one type of output? */
1286 int caps = intel_sdvo->caps.output_flags & 0xf;
1287 return caps & -caps;
1288 }
1289
1290 static struct edid *
intel_sdvo_get_edid(struct drm_connector * connector)1291 intel_sdvo_get_edid(struct drm_connector *connector)
1292 {
1293 struct intel_sdvo *sdvo = intel_attached_sdvo(connector);
1294 return drm_get_edid(connector, &sdvo->ddc);
1295 }
1296
1297 /* Mac mini hack -- use the same DDC as the analog connector */
1298 static struct edid *
intel_sdvo_get_analog_edid(struct drm_connector * connector)1299 intel_sdvo_get_analog_edid(struct drm_connector *connector)
1300 {
1301 struct drm_i915_private *dev_priv = connector->dev->dev_private;
1302
1303 return drm_get_edid(connector,
1304 &dev_priv->gmbus[dev_priv->crt_ddc_pin].adapter);
1305 }
1306
1307 enum drm_connector_status
intel_sdvo_hdmi_sink_detect(struct drm_connector * connector)1308 intel_sdvo_hdmi_sink_detect(struct drm_connector *connector)
1309 {
1310 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1311 enum drm_connector_status status;
1312 struct edid *edid;
1313
1314 edid = intel_sdvo_get_edid(connector);
1315
1316 if (edid == NULL && intel_sdvo_multifunc_encoder(intel_sdvo)) {
1317 u8 ddc, saved_ddc = intel_sdvo->ddc_bus;
1318
1319 /*
1320 * Don't use the 1 as the argument of DDC bus switch to get
1321 * the EDID. It is used for SDVO SPD ROM.
1322 */
1323 for (ddc = intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
1324 intel_sdvo->ddc_bus = ddc;
1325 edid = intel_sdvo_get_edid(connector);
1326 if (edid)
1327 break;
1328 }
1329 /*
1330 * If we found the EDID on the other bus,
1331 * assume that is the correct DDC bus.
1332 */
1333 if (edid == NULL)
1334 intel_sdvo->ddc_bus = saved_ddc;
1335 }
1336
1337 /*
1338 * When there is no edid and no monitor is connected with VGA
1339 * port, try to use the CRT ddc to read the EDID for DVI-connector.
1340 */
1341 if (edid == NULL)
1342 edid = intel_sdvo_get_analog_edid(connector);
1343
1344 status = connector_status_unknown;
1345 if (edid != NULL) {
1346 /* DDC bus is shared, match EDID to connector type */
1347 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
1348 status = connector_status_connected;
1349 if (intel_sdvo->is_hdmi) {
1350 intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid);
1351 intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid);
1352 }
1353 } else
1354 status = connector_status_disconnected;
1355 connector->display_info.raw_edid = NULL;
1356 kfree(edid);
1357 }
1358
1359 if (status == connector_status_connected) {
1360 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1361 if (intel_sdvo_connector->force_audio)
1362 intel_sdvo->has_hdmi_audio = intel_sdvo_connector->force_audio > 0;
1363 }
1364
1365 return status;
1366 }
1367
1368 static enum drm_connector_status
intel_sdvo_detect(struct drm_connector * connector,bool force)1369 intel_sdvo_detect(struct drm_connector *connector, bool force)
1370 {
1371 uint16_t response;
1372 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1373 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1374 enum drm_connector_status ret;
1375
1376 if (!intel_sdvo_write_cmd(intel_sdvo,
1377 SDVO_CMD_GET_ATTACHED_DISPLAYS, NULL, 0))
1378 return connector_status_unknown;
1379
1380 /* add 30ms delay when the output type might be TV */
1381 if (intel_sdvo->caps.output_flags &
1382 (SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_CVBS0))
1383 mdelay(30);
1384
1385 if (!intel_sdvo_read_response(intel_sdvo, &response, 2))
1386 return connector_status_unknown;
1387
1388 DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
1389 response & 0xff, response >> 8,
1390 intel_sdvo_connector->output_flag);
1391
1392 if (response == 0)
1393 return connector_status_disconnected;
1394
1395 intel_sdvo->attached_output = response;
1396
1397 intel_sdvo->has_hdmi_monitor = false;
1398 intel_sdvo->has_hdmi_audio = false;
1399
1400 if ((intel_sdvo_connector->output_flag & response) == 0)
1401 ret = connector_status_disconnected;
1402 else if (IS_TMDS(intel_sdvo_connector))
1403 ret = intel_sdvo_hdmi_sink_detect(connector);
1404 else {
1405 struct edid *edid;
1406
1407 /* if we have an edid check it matches the connection */
1408 edid = intel_sdvo_get_edid(connector);
1409 if (edid == NULL)
1410 edid = intel_sdvo_get_analog_edid(connector);
1411 if (edid != NULL) {
1412 if (edid->input & DRM_EDID_INPUT_DIGITAL)
1413 ret = connector_status_disconnected;
1414 else
1415 ret = connector_status_connected;
1416 connector->display_info.raw_edid = NULL;
1417 kfree(edid);
1418 } else
1419 ret = connector_status_connected;
1420 }
1421
1422 /* May update encoder flag for like clock for SDVO TV, etc.*/
1423 if (ret == connector_status_connected) {
1424 intel_sdvo->is_tv = false;
1425 intel_sdvo->is_lvds = false;
1426 intel_sdvo->base.needs_tv_clock = false;
1427
1428 if (response & SDVO_TV_MASK) {
1429 intel_sdvo->is_tv = true;
1430 intel_sdvo->base.needs_tv_clock = true;
1431 }
1432 if (response & SDVO_LVDS_MASK)
1433 intel_sdvo->is_lvds = intel_sdvo->sdvo_lvds_fixed_mode != NULL;
1434 }
1435
1436 return ret;
1437 }
1438
intel_sdvo_get_ddc_modes(struct drm_connector * connector)1439 static void intel_sdvo_get_ddc_modes(struct drm_connector *connector)
1440 {
1441 struct edid *edid;
1442
1443 /* set the bus switch and get the modes */
1444 edid = intel_sdvo_get_edid(connector);
1445
1446 /*
1447 * Mac mini hack. On this device, the DVI-I connector shares one DDC
1448 * link between analog and digital outputs. So, if the regular SDVO
1449 * DDC fails, check to see if the analog output is disconnected, in
1450 * which case we'll look there for the digital DDC data.
1451 */
1452 if (edid == NULL)
1453 edid = intel_sdvo_get_analog_edid(connector);
1454
1455 if (edid != NULL) {
1456 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1457 bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL);
1458 bool connector_is_digital = !!IS_TMDS(intel_sdvo_connector);
1459
1460 if (connector_is_digital == monitor_is_digital) {
1461 drm_mode_connector_update_edid_property(connector, edid);
1462 drm_add_edid_modes(connector, edid);
1463 }
1464
1465 connector->display_info.raw_edid = NULL;
1466 kfree(edid);
1467 }
1468 }
1469
1470 /*
1471 * Set of SDVO TV modes.
1472 * Note! This is in reply order (see loop in get_tv_modes).
1473 * XXX: all 60Hz refresh?
1474 */
1475 static const struct drm_display_mode sdvo_tv_modes[] = {
1476 { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
1477 416, 0, 200, 201, 232, 233, 0,
1478 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1479 { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
1480 416, 0, 240, 241, 272, 273, 0,
1481 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1482 { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
1483 496, 0, 300, 301, 332, 333, 0,
1484 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1485 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
1486 736, 0, 350, 351, 382, 383, 0,
1487 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1488 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
1489 736, 0, 400, 401, 432, 433, 0,
1490 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1491 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
1492 736, 0, 480, 481, 512, 513, 0,
1493 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1494 { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
1495 800, 0, 480, 481, 512, 513, 0,
1496 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1497 { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
1498 800, 0, 576, 577, 608, 609, 0,
1499 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1500 { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
1501 816, 0, 350, 351, 382, 383, 0,
1502 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1503 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
1504 816, 0, 400, 401, 432, 433, 0,
1505 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1506 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
1507 816, 0, 480, 481, 512, 513, 0,
1508 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1509 { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
1510 816, 0, 540, 541, 572, 573, 0,
1511 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1512 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
1513 816, 0, 576, 577, 608, 609, 0,
1514 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1515 { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
1516 864, 0, 576, 577, 608, 609, 0,
1517 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1518 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
1519 896, 0, 600, 601, 632, 633, 0,
1520 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1521 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
1522 928, 0, 624, 625, 656, 657, 0,
1523 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1524 { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
1525 1016, 0, 766, 767, 798, 799, 0,
1526 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1527 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
1528 1120, 0, 768, 769, 800, 801, 0,
1529 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1530 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
1531 1376, 0, 1024, 1025, 1056, 1057, 0,
1532 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1533 };
1534
intel_sdvo_get_tv_modes(struct drm_connector * connector)1535 static void intel_sdvo_get_tv_modes(struct drm_connector *connector)
1536 {
1537 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1538 struct intel_sdvo_sdtv_resolution_request tv_res;
1539 uint32_t reply = 0, format_map = 0;
1540 int i;
1541
1542 /* Read the list of supported input resolutions for the selected TV
1543 * format.
1544 */
1545 format_map = 1 << intel_sdvo->tv_format_index;
1546 memcpy(&tv_res, &format_map,
1547 min(sizeof(format_map), sizeof(struct intel_sdvo_sdtv_resolution_request)));
1548
1549 if (!intel_sdvo_set_target_output(intel_sdvo, intel_sdvo->attached_output))
1550 return;
1551
1552 BUILD_BUG_ON(sizeof(tv_res) != 3);
1553 if (!intel_sdvo_write_cmd(intel_sdvo,
1554 SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
1555 &tv_res, sizeof(tv_res)))
1556 return;
1557 if (!intel_sdvo_read_response(intel_sdvo, &reply, 3))
1558 return;
1559
1560 for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
1561 if (reply & (1 << i)) {
1562 struct drm_display_mode *nmode;
1563 nmode = drm_mode_duplicate(connector->dev,
1564 &sdvo_tv_modes[i]);
1565 if (nmode)
1566 drm_mode_probed_add(connector, nmode);
1567 }
1568 }
1569
intel_sdvo_get_lvds_modes(struct drm_connector * connector)1570 static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
1571 {
1572 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1573 struct drm_i915_private *dev_priv = connector->dev->dev_private;
1574 struct drm_display_mode *newmode;
1575
1576 /*
1577 * Attempt to get the mode list from DDC.
1578 * Assume that the preferred modes are
1579 * arranged in priority order.
1580 */
1581 intel_ddc_get_modes(connector, intel_sdvo->i2c);
1582 if (list_empty(&connector->probed_modes) == false)
1583 goto end;
1584
1585 /* Fetch modes from VBT */
1586 if (dev_priv->sdvo_lvds_vbt_mode != NULL) {
1587 newmode = drm_mode_duplicate(connector->dev,
1588 dev_priv->sdvo_lvds_vbt_mode);
1589 if (newmode != NULL) {
1590 /* Guarantee the mode is preferred */
1591 newmode->type = (DRM_MODE_TYPE_PREFERRED |
1592 DRM_MODE_TYPE_DRIVER);
1593 drm_mode_probed_add(connector, newmode);
1594 }
1595 }
1596
1597 end:
1598 list_for_each_entry(newmode, &connector->probed_modes, head) {
1599 if (newmode->type & DRM_MODE_TYPE_PREFERRED) {
1600 intel_sdvo->sdvo_lvds_fixed_mode =
1601 drm_mode_duplicate(connector->dev, newmode);
1602
1603 drm_mode_set_crtcinfo(intel_sdvo->sdvo_lvds_fixed_mode,
1604 0);
1605
1606 intel_sdvo->is_lvds = true;
1607 break;
1608 }
1609 }
1610
1611 }
1612
intel_sdvo_get_modes(struct drm_connector * connector)1613 static int intel_sdvo_get_modes(struct drm_connector *connector)
1614 {
1615 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1616
1617 if (IS_TV(intel_sdvo_connector))
1618 intel_sdvo_get_tv_modes(connector);
1619 else if (IS_LVDS(intel_sdvo_connector))
1620 intel_sdvo_get_lvds_modes(connector);
1621 else
1622 intel_sdvo_get_ddc_modes(connector);
1623
1624 return !list_empty(&connector->probed_modes);
1625 }
1626
1627 static void
intel_sdvo_destroy_enhance_property(struct drm_connector * connector)1628 intel_sdvo_destroy_enhance_property(struct drm_connector *connector)
1629 {
1630 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1631 struct drm_device *dev = connector->dev;
1632
1633 if (intel_sdvo_connector->left)
1634 drm_property_destroy(dev, intel_sdvo_connector->left);
1635 if (intel_sdvo_connector->right)
1636 drm_property_destroy(dev, intel_sdvo_connector->right);
1637 if (intel_sdvo_connector->top)
1638 drm_property_destroy(dev, intel_sdvo_connector->top);
1639 if (intel_sdvo_connector->bottom)
1640 drm_property_destroy(dev, intel_sdvo_connector->bottom);
1641 if (intel_sdvo_connector->hpos)
1642 drm_property_destroy(dev, intel_sdvo_connector->hpos);
1643 if (intel_sdvo_connector->vpos)
1644 drm_property_destroy(dev, intel_sdvo_connector->vpos);
1645 if (intel_sdvo_connector->saturation)
1646 drm_property_destroy(dev, intel_sdvo_connector->saturation);
1647 if (intel_sdvo_connector->contrast)
1648 drm_property_destroy(dev, intel_sdvo_connector->contrast);
1649 if (intel_sdvo_connector->hue)
1650 drm_property_destroy(dev, intel_sdvo_connector->hue);
1651 if (intel_sdvo_connector->sharpness)
1652 drm_property_destroy(dev, intel_sdvo_connector->sharpness);
1653 if (intel_sdvo_connector->flicker_filter)
1654 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter);
1655 if (intel_sdvo_connector->flicker_filter_2d)
1656 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_2d);
1657 if (intel_sdvo_connector->flicker_filter_adaptive)
1658 drm_property_destroy(dev, intel_sdvo_connector->flicker_filter_adaptive);
1659 if (intel_sdvo_connector->tv_luma_filter)
1660 drm_property_destroy(dev, intel_sdvo_connector->tv_luma_filter);
1661 if (intel_sdvo_connector->tv_chroma_filter)
1662 drm_property_destroy(dev, intel_sdvo_connector->tv_chroma_filter);
1663 if (intel_sdvo_connector->dot_crawl)
1664 drm_property_destroy(dev, intel_sdvo_connector->dot_crawl);
1665 if (intel_sdvo_connector->brightness)
1666 drm_property_destroy(dev, intel_sdvo_connector->brightness);
1667 }
1668
intel_sdvo_destroy(struct drm_connector * connector)1669 static void intel_sdvo_destroy(struct drm_connector *connector)
1670 {
1671 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1672
1673 if (intel_sdvo_connector->tv_format)
1674 drm_property_destroy(connector->dev,
1675 intel_sdvo_connector->tv_format);
1676
1677 intel_sdvo_destroy_enhance_property(connector);
1678 drm_sysfs_connector_remove(connector);
1679 drm_connector_cleanup(connector);
1680 kfree(connector);
1681 }
1682
intel_sdvo_detect_hdmi_audio(struct drm_connector * connector)1683 static bool intel_sdvo_detect_hdmi_audio(struct drm_connector *connector)
1684 {
1685 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1686 struct edid *edid;
1687 bool has_audio = false;
1688
1689 if (!intel_sdvo->is_hdmi)
1690 return false;
1691
1692 edid = intel_sdvo_get_edid(connector);
1693 if (edid != NULL && edid->input & DRM_EDID_INPUT_DIGITAL)
1694 has_audio = drm_detect_monitor_audio(edid);
1695
1696 return has_audio;
1697 }
1698
1699 static int
intel_sdvo_set_property(struct drm_connector * connector,struct drm_property * property,uint64_t val)1700 intel_sdvo_set_property(struct drm_connector *connector,
1701 struct drm_property *property,
1702 uint64_t val)
1703 {
1704 struct intel_sdvo *intel_sdvo = intel_attached_sdvo(connector);
1705 struct intel_sdvo_connector *intel_sdvo_connector = to_intel_sdvo_connector(connector);
1706 struct drm_i915_private *dev_priv = connector->dev->dev_private;
1707 uint16_t temp_value;
1708 uint8_t cmd;
1709 int ret;
1710
1711 ret = drm_connector_property_set_value(connector, property, val);
1712 if (ret)
1713 return ret;
1714
1715 if (property == intel_sdvo_connector->force_audio_property) {
1716 int i = val;
1717 bool has_audio;
1718
1719 if (i == intel_sdvo_connector->force_audio)
1720 return 0;
1721
1722 intel_sdvo_connector->force_audio = i;
1723
1724 if (i == 0)
1725 has_audio = intel_sdvo_detect_hdmi_audio(connector);
1726 else
1727 has_audio = i > 0;
1728
1729 if (has_audio == intel_sdvo->has_hdmi_audio)
1730 return 0;
1731
1732 intel_sdvo->has_hdmi_audio = has_audio;
1733 goto done;
1734 }
1735
1736 if (property == dev_priv->broadcast_rgb_property) {
1737 if (val == !!intel_sdvo->color_range)
1738 return 0;
1739
1740 intel_sdvo->color_range = val ? SDVO_COLOR_RANGE_16_235 : 0;
1741 goto done;
1742 }
1743
1744 #define CHECK_PROPERTY(name, NAME) \
1745 if (intel_sdvo_connector->name == property) { \
1746 if (intel_sdvo_connector->cur_##name == temp_value) return 0; \
1747 if (intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \
1748 cmd = SDVO_CMD_SET_##NAME; \
1749 intel_sdvo_connector->cur_##name = temp_value; \
1750 goto set_value; \
1751 }
1752
1753 if (property == intel_sdvo_connector->tv_format) {
1754 if (val >= TV_FORMAT_NUM)
1755 return -EINVAL;
1756
1757 if (intel_sdvo->tv_format_index ==
1758 intel_sdvo_connector->tv_format_supported[val])
1759 return 0;
1760
1761 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[val];
1762 goto done;
1763 } else if (IS_TV_OR_LVDS(intel_sdvo_connector)) {
1764 temp_value = val;
1765 if (intel_sdvo_connector->left == property) {
1766 drm_connector_property_set_value(connector,
1767 intel_sdvo_connector->right, val);
1768 if (intel_sdvo_connector->left_margin == temp_value)
1769 return 0;
1770
1771 intel_sdvo_connector->left_margin = temp_value;
1772 intel_sdvo_connector->right_margin = temp_value;
1773 temp_value = intel_sdvo_connector->max_hscan -
1774 intel_sdvo_connector->left_margin;
1775 cmd = SDVO_CMD_SET_OVERSCAN_H;
1776 goto set_value;
1777 } else if (intel_sdvo_connector->right == property) {
1778 drm_connector_property_set_value(connector,
1779 intel_sdvo_connector->left, val);
1780 if (intel_sdvo_connector->right_margin == temp_value)
1781 return 0;
1782
1783 intel_sdvo_connector->left_margin = temp_value;
1784 intel_sdvo_connector->right_margin = temp_value;
1785 temp_value = intel_sdvo_connector->max_hscan -
1786 intel_sdvo_connector->left_margin;
1787 cmd = SDVO_CMD_SET_OVERSCAN_H;
1788 goto set_value;
1789 } else if (intel_sdvo_connector->top == property) {
1790 drm_connector_property_set_value(connector,
1791 intel_sdvo_connector->bottom, val);
1792 if (intel_sdvo_connector->top_margin == temp_value)
1793 return 0;
1794
1795 intel_sdvo_connector->top_margin = temp_value;
1796 intel_sdvo_connector->bottom_margin = temp_value;
1797 temp_value = intel_sdvo_connector->max_vscan -
1798 intel_sdvo_connector->top_margin;
1799 cmd = SDVO_CMD_SET_OVERSCAN_V;
1800 goto set_value;
1801 } else if (intel_sdvo_connector->bottom == property) {
1802 drm_connector_property_set_value(connector,
1803 intel_sdvo_connector->top, val);
1804 if (intel_sdvo_connector->bottom_margin == temp_value)
1805 return 0;
1806
1807 intel_sdvo_connector->top_margin = temp_value;
1808 intel_sdvo_connector->bottom_margin = temp_value;
1809 temp_value = intel_sdvo_connector->max_vscan -
1810 intel_sdvo_connector->top_margin;
1811 cmd = SDVO_CMD_SET_OVERSCAN_V;
1812 goto set_value;
1813 }
1814 CHECK_PROPERTY(hpos, HPOS)
1815 CHECK_PROPERTY(vpos, VPOS)
1816 CHECK_PROPERTY(saturation, SATURATION)
1817 CHECK_PROPERTY(contrast, CONTRAST)
1818 CHECK_PROPERTY(hue, HUE)
1819 CHECK_PROPERTY(brightness, BRIGHTNESS)
1820 CHECK_PROPERTY(sharpness, SHARPNESS)
1821 CHECK_PROPERTY(flicker_filter, FLICKER_FILTER)
1822 CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D)
1823 CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE)
1824 CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER)
1825 CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER)
1826 CHECK_PROPERTY(dot_crawl, DOT_CRAWL)
1827 }
1828
1829 return -EINVAL; /* unknown property */
1830
1831 set_value:
1832 if (!intel_sdvo_set_value(intel_sdvo, cmd, &temp_value, 2))
1833 return -EIO;
1834
1835
1836 done:
1837 if (intel_sdvo->base.base.crtc) {
1838 struct drm_crtc *crtc = intel_sdvo->base.base.crtc;
1839 drm_crtc_helper_set_mode(crtc, &crtc->mode, crtc->x,
1840 crtc->y, crtc->fb);
1841 }
1842
1843 return 0;
1844 #undef CHECK_PROPERTY
1845 }
1846
1847 static const struct drm_encoder_helper_funcs intel_sdvo_helper_funcs = {
1848 .dpms = intel_sdvo_dpms,
1849 .mode_fixup = intel_sdvo_mode_fixup,
1850 .prepare = intel_encoder_prepare,
1851 .mode_set = intel_sdvo_mode_set,
1852 .commit = intel_encoder_commit,
1853 };
1854
1855 static const struct drm_connector_funcs intel_sdvo_connector_funcs = {
1856 .dpms = drm_helper_connector_dpms,
1857 .detect = intel_sdvo_detect,
1858 .fill_modes = drm_helper_probe_single_connector_modes,
1859 .set_property = intel_sdvo_set_property,
1860 .destroy = intel_sdvo_destroy,
1861 };
1862
1863 static const struct drm_connector_helper_funcs intel_sdvo_connector_helper_funcs = {
1864 .get_modes = intel_sdvo_get_modes,
1865 .mode_valid = intel_sdvo_mode_valid,
1866 .best_encoder = intel_best_encoder,
1867 };
1868
intel_sdvo_enc_destroy(struct drm_encoder * encoder)1869 static void intel_sdvo_enc_destroy(struct drm_encoder *encoder)
1870 {
1871 struct intel_sdvo *intel_sdvo = to_intel_sdvo(encoder);
1872
1873 if (intel_sdvo->sdvo_lvds_fixed_mode != NULL)
1874 drm_mode_destroy(encoder->dev,
1875 intel_sdvo->sdvo_lvds_fixed_mode);
1876
1877 i2c_del_adapter(&intel_sdvo->ddc);
1878 intel_encoder_destroy(encoder);
1879 }
1880
1881 static const struct drm_encoder_funcs intel_sdvo_enc_funcs = {
1882 .destroy = intel_sdvo_enc_destroy,
1883 };
1884
1885 static void
intel_sdvo_guess_ddc_bus(struct intel_sdvo * sdvo)1886 intel_sdvo_guess_ddc_bus(struct intel_sdvo *sdvo)
1887 {
1888 uint16_t mask = 0;
1889 unsigned int num_bits;
1890
1891 /* Make a mask of outputs less than or equal to our own priority in the
1892 * list.
1893 */
1894 switch (sdvo->controlled_output) {
1895 case SDVO_OUTPUT_LVDS1:
1896 mask |= SDVO_OUTPUT_LVDS1;
1897 case SDVO_OUTPUT_LVDS0:
1898 mask |= SDVO_OUTPUT_LVDS0;
1899 case SDVO_OUTPUT_TMDS1:
1900 mask |= SDVO_OUTPUT_TMDS1;
1901 case SDVO_OUTPUT_TMDS0:
1902 mask |= SDVO_OUTPUT_TMDS0;
1903 case SDVO_OUTPUT_RGB1:
1904 mask |= SDVO_OUTPUT_RGB1;
1905 case SDVO_OUTPUT_RGB0:
1906 mask |= SDVO_OUTPUT_RGB0;
1907 break;
1908 }
1909
1910 /* Count bits to find what number we are in the priority list. */
1911 mask &= sdvo->caps.output_flags;
1912 num_bits = hweight16(mask);
1913 /* If more than 3 outputs, default to DDC bus 3 for now. */
1914 if (num_bits > 3)
1915 num_bits = 3;
1916
1917 /* Corresponds to SDVO_CONTROL_BUS_DDCx */
1918 sdvo->ddc_bus = 1 << num_bits;
1919 }
1920
1921 /**
1922 * Choose the appropriate DDC bus for control bus switch command for this
1923 * SDVO output based on the controlled output.
1924 *
1925 * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
1926 * outputs, then LVDS outputs.
1927 */
1928 static void
intel_sdvo_select_ddc_bus(struct drm_i915_private * dev_priv,struct intel_sdvo * sdvo,u32 reg)1929 intel_sdvo_select_ddc_bus(struct drm_i915_private *dev_priv,
1930 struct intel_sdvo *sdvo, u32 reg)
1931 {
1932 struct sdvo_device_mapping *mapping;
1933
1934 if (IS_SDVOB(reg))
1935 mapping = &(dev_priv->sdvo_mappings[0]);
1936 else
1937 mapping = &(dev_priv->sdvo_mappings[1]);
1938
1939 if (mapping->initialized)
1940 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
1941 else
1942 intel_sdvo_guess_ddc_bus(sdvo);
1943 }
1944
1945 static void
intel_sdvo_select_i2c_bus(struct drm_i915_private * dev_priv,struct intel_sdvo * sdvo,u32 reg)1946 intel_sdvo_select_i2c_bus(struct drm_i915_private *dev_priv,
1947 struct intel_sdvo *sdvo, u32 reg)
1948 {
1949 struct sdvo_device_mapping *mapping;
1950 u8 pin, speed;
1951
1952 if (IS_SDVOB(reg))
1953 mapping = &dev_priv->sdvo_mappings[0];
1954 else
1955 mapping = &dev_priv->sdvo_mappings[1];
1956
1957 pin = GMBUS_PORT_DPB;
1958 speed = GMBUS_RATE_1MHZ >> 8;
1959 if (mapping->initialized) {
1960 pin = mapping->i2c_pin;
1961 speed = mapping->i2c_speed;
1962 }
1963
1964 if (pin < GMBUS_NUM_PORTS) {
1965 sdvo->i2c = &dev_priv->gmbus[pin].adapter;
1966 intel_gmbus_set_speed(sdvo->i2c, speed);
1967 intel_gmbus_force_bit(sdvo->i2c, true);
1968 } else
1969 sdvo->i2c = &dev_priv->gmbus[GMBUS_PORT_DPB].adapter;
1970 }
1971
1972 static bool
intel_sdvo_is_hdmi_connector(struct intel_sdvo * intel_sdvo,int device)1973 intel_sdvo_is_hdmi_connector(struct intel_sdvo *intel_sdvo, int device)
1974 {
1975 return intel_sdvo_check_supp_encode(intel_sdvo);
1976 }
1977
1978 static u8
intel_sdvo_get_slave_addr(struct drm_device * dev,int sdvo_reg)1979 intel_sdvo_get_slave_addr(struct drm_device *dev, int sdvo_reg)
1980 {
1981 struct drm_i915_private *dev_priv = dev->dev_private;
1982 struct sdvo_device_mapping *my_mapping, *other_mapping;
1983
1984 if (IS_SDVOB(sdvo_reg)) {
1985 my_mapping = &dev_priv->sdvo_mappings[0];
1986 other_mapping = &dev_priv->sdvo_mappings[1];
1987 } else {
1988 my_mapping = &dev_priv->sdvo_mappings[1];
1989 other_mapping = &dev_priv->sdvo_mappings[0];
1990 }
1991
1992 /* If the BIOS described our SDVO device, take advantage of it. */
1993 if (my_mapping->slave_addr)
1994 return my_mapping->slave_addr;
1995
1996 /* If the BIOS only described a different SDVO device, use the
1997 * address that it isn't using.
1998 */
1999 if (other_mapping->slave_addr) {
2000 if (other_mapping->slave_addr == 0x70)
2001 return 0x72;
2002 else
2003 return 0x70;
2004 }
2005
2006 /* No SDVO device info is found for another DVO port,
2007 * so use mapping assumption we had before BIOS parsing.
2008 */
2009 if (IS_SDVOB(sdvo_reg))
2010 return 0x70;
2011 else
2012 return 0x72;
2013 }
2014
2015 static void
intel_sdvo_connector_init(struct intel_sdvo_connector * connector,struct intel_sdvo * encoder)2016 intel_sdvo_connector_init(struct intel_sdvo_connector *connector,
2017 struct intel_sdvo *encoder)
2018 {
2019 drm_connector_init(encoder->base.base.dev,
2020 &connector->base.base,
2021 &intel_sdvo_connector_funcs,
2022 connector->base.base.connector_type);
2023
2024 drm_connector_helper_add(&connector->base.base,
2025 &intel_sdvo_connector_helper_funcs);
2026
2027 connector->base.base.interlace_allowed = 0;
2028 connector->base.base.doublescan_allowed = 0;
2029 connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
2030
2031 intel_connector_attach_encoder(&connector->base, &encoder->base);
2032 drm_sysfs_connector_add(&connector->base.base);
2033 }
2034
2035 static void
intel_sdvo_add_hdmi_properties(struct intel_sdvo_connector * connector)2036 intel_sdvo_add_hdmi_properties(struct intel_sdvo_connector *connector)
2037 {
2038 struct drm_device *dev = connector->base.base.dev;
2039
2040 connector->force_audio_property =
2041 drm_property_create(dev, DRM_MODE_PROP_RANGE, "force_audio", 2);
2042 if (connector->force_audio_property) {
2043 connector->force_audio_property->values[0] = -1;
2044 connector->force_audio_property->values[1] = 1;
2045 drm_connector_attach_property(&connector->base.base,
2046 connector->force_audio_property, 0);
2047 }
2048
2049 if (INTEL_INFO(dev)->gen >= 4 && IS_MOBILE(dev))
2050 intel_attach_broadcast_rgb_property(&connector->base.base);
2051 }
2052
2053 static bool
intel_sdvo_dvi_init(struct intel_sdvo * intel_sdvo,int device)2054 intel_sdvo_dvi_init(struct intel_sdvo *intel_sdvo, int device)
2055 {
2056 struct drm_encoder *encoder = &intel_sdvo->base.base;
2057 struct drm_connector *connector;
2058 struct intel_connector *intel_connector;
2059 struct intel_sdvo_connector *intel_sdvo_connector;
2060
2061 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2062 if (!intel_sdvo_connector)
2063 return false;
2064
2065 if (device == 0) {
2066 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
2067 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
2068 } else if (device == 1) {
2069 intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
2070 intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
2071 }
2072
2073 intel_connector = &intel_sdvo_connector->base;
2074 connector = &intel_connector->base;
2075 connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
2076 encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
2077 connector->connector_type = DRM_MODE_CONNECTOR_DVID;
2078
2079 if (intel_sdvo_is_hdmi_connector(intel_sdvo, device)) {
2080 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
2081 intel_sdvo->is_hdmi = true;
2082 }
2083 intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2084 (1 << INTEL_ANALOG_CLONE_BIT));
2085
2086 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2087 if (intel_sdvo->is_hdmi)
2088 intel_sdvo_add_hdmi_properties(intel_sdvo_connector);
2089
2090 return true;
2091 }
2092
2093 static bool
intel_sdvo_tv_init(struct intel_sdvo * intel_sdvo,int type)2094 intel_sdvo_tv_init(struct intel_sdvo *intel_sdvo, int type)
2095 {
2096 struct drm_encoder *encoder = &intel_sdvo->base.base;
2097 struct drm_connector *connector;
2098 struct intel_connector *intel_connector;
2099 struct intel_sdvo_connector *intel_sdvo_connector;
2100
2101 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2102 if (!intel_sdvo_connector)
2103 return false;
2104
2105 intel_connector = &intel_sdvo_connector->base;
2106 connector = &intel_connector->base;
2107 encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
2108 connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
2109
2110 intel_sdvo->controlled_output |= type;
2111 intel_sdvo_connector->output_flag = type;
2112
2113 intel_sdvo->is_tv = true;
2114 intel_sdvo->base.needs_tv_clock = true;
2115 intel_sdvo->base.clone_mask = 1 << INTEL_SDVO_TV_CLONE_BIT;
2116
2117 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2118
2119 if (!intel_sdvo_tv_create_property(intel_sdvo, intel_sdvo_connector, type))
2120 goto err;
2121
2122 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2123 goto err;
2124
2125 return true;
2126
2127 err:
2128 intel_sdvo_destroy(connector);
2129 return false;
2130 }
2131
2132 static bool
intel_sdvo_analog_init(struct intel_sdvo * intel_sdvo,int device)2133 intel_sdvo_analog_init(struct intel_sdvo *intel_sdvo, int device)
2134 {
2135 struct drm_encoder *encoder = &intel_sdvo->base.base;
2136 struct drm_connector *connector;
2137 struct intel_connector *intel_connector;
2138 struct intel_sdvo_connector *intel_sdvo_connector;
2139
2140 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2141 if (!intel_sdvo_connector)
2142 return false;
2143
2144 intel_connector = &intel_sdvo_connector->base;
2145 connector = &intel_connector->base;
2146 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2147 encoder->encoder_type = DRM_MODE_ENCODER_DAC;
2148 connector->connector_type = DRM_MODE_CONNECTOR_VGA;
2149
2150 if (device == 0) {
2151 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
2152 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
2153 } else if (device == 1) {
2154 intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
2155 intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
2156 }
2157
2158 intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2159 (1 << INTEL_ANALOG_CLONE_BIT));
2160
2161 intel_sdvo_connector_init(intel_sdvo_connector,
2162 intel_sdvo);
2163 return true;
2164 }
2165
2166 static bool
intel_sdvo_lvds_init(struct intel_sdvo * intel_sdvo,int device)2167 intel_sdvo_lvds_init(struct intel_sdvo *intel_sdvo, int device)
2168 {
2169 struct drm_encoder *encoder = &intel_sdvo->base.base;
2170 struct drm_connector *connector;
2171 struct intel_connector *intel_connector;
2172 struct intel_sdvo_connector *intel_sdvo_connector;
2173
2174 intel_sdvo_connector = kzalloc(sizeof(struct intel_sdvo_connector), GFP_KERNEL);
2175 if (!intel_sdvo_connector)
2176 return false;
2177
2178 intel_connector = &intel_sdvo_connector->base;
2179 connector = &intel_connector->base;
2180 encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
2181 connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
2182
2183 if (device == 0) {
2184 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
2185 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
2186 } else if (device == 1) {
2187 intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
2188 intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
2189 }
2190
2191 intel_sdvo->base.clone_mask = ((1 << INTEL_ANALOG_CLONE_BIT) |
2192 (1 << INTEL_SDVO_LVDS_CLONE_BIT));
2193
2194 intel_sdvo_connector_init(intel_sdvo_connector, intel_sdvo);
2195 if (!intel_sdvo_create_enhance_property(intel_sdvo, intel_sdvo_connector))
2196 goto err;
2197
2198 return true;
2199
2200 err:
2201 intel_sdvo_destroy(connector);
2202 return false;
2203 }
2204
2205 static bool
intel_sdvo_output_setup(struct intel_sdvo * intel_sdvo,uint16_t flags)2206 intel_sdvo_output_setup(struct intel_sdvo *intel_sdvo, uint16_t flags)
2207 {
2208 intel_sdvo->is_tv = false;
2209 intel_sdvo->base.needs_tv_clock = false;
2210 intel_sdvo->is_lvds = false;
2211
2212 /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
2213
2214 if (flags & SDVO_OUTPUT_TMDS0)
2215 if (!intel_sdvo_dvi_init(intel_sdvo, 0))
2216 return false;
2217
2218 if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
2219 if (!intel_sdvo_dvi_init(intel_sdvo, 1))
2220 return false;
2221
2222 /* TV has no XXX1 function block */
2223 if (flags & SDVO_OUTPUT_SVID0)
2224 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_SVID0))
2225 return false;
2226
2227 if (flags & SDVO_OUTPUT_CVBS0)
2228 if (!intel_sdvo_tv_init(intel_sdvo, SDVO_OUTPUT_CVBS0))
2229 return false;
2230
2231 if (flags & SDVO_OUTPUT_RGB0)
2232 if (!intel_sdvo_analog_init(intel_sdvo, 0))
2233 return false;
2234
2235 if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
2236 if (!intel_sdvo_analog_init(intel_sdvo, 1))
2237 return false;
2238
2239 if (flags & SDVO_OUTPUT_LVDS0)
2240 if (!intel_sdvo_lvds_init(intel_sdvo, 0))
2241 return false;
2242
2243 if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
2244 if (!intel_sdvo_lvds_init(intel_sdvo, 1))
2245 return false;
2246
2247 if ((flags & SDVO_OUTPUT_MASK) == 0) {
2248 unsigned char bytes[2];
2249
2250 intel_sdvo->controlled_output = 0;
2251 memcpy(bytes, &intel_sdvo->caps.output_flags, 2);
2252 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
2253 SDVO_NAME(intel_sdvo),
2254 bytes[0], bytes[1]);
2255 return false;
2256 }
2257 intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1);
2258
2259 return true;
2260 }
2261
intel_sdvo_tv_create_property(struct intel_sdvo * intel_sdvo,struct intel_sdvo_connector * intel_sdvo_connector,int type)2262 static bool intel_sdvo_tv_create_property(struct intel_sdvo *intel_sdvo,
2263 struct intel_sdvo_connector *intel_sdvo_connector,
2264 int type)
2265 {
2266 struct drm_device *dev = intel_sdvo->base.base.dev;
2267 struct intel_sdvo_tv_format format;
2268 uint32_t format_map, i;
2269
2270 if (!intel_sdvo_set_target_output(intel_sdvo, type))
2271 return false;
2272
2273 BUILD_BUG_ON(sizeof(format) != 6);
2274 if (!intel_sdvo_get_value(intel_sdvo,
2275 SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
2276 &format, sizeof(format)))
2277 return false;
2278
2279 memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
2280
2281 if (format_map == 0)
2282 return false;
2283
2284 intel_sdvo_connector->format_supported_num = 0;
2285 for (i = 0 ; i < TV_FORMAT_NUM; i++)
2286 if (format_map & (1 << i))
2287 intel_sdvo_connector->tv_format_supported[intel_sdvo_connector->format_supported_num++] = i;
2288
2289
2290 intel_sdvo_connector->tv_format =
2291 drm_property_create(dev, DRM_MODE_PROP_ENUM,
2292 "mode", intel_sdvo_connector->format_supported_num);
2293 if (!intel_sdvo_connector->tv_format)
2294 return false;
2295
2296 for (i = 0; i < intel_sdvo_connector->format_supported_num; i++)
2297 drm_property_add_enum(
2298 intel_sdvo_connector->tv_format, i,
2299 i, tv_format_names[intel_sdvo_connector->tv_format_supported[i]]);
2300
2301 intel_sdvo->tv_format_index = intel_sdvo_connector->tv_format_supported[0];
2302 drm_connector_attach_property(&intel_sdvo_connector->base.base,
2303 intel_sdvo_connector->tv_format, 0);
2304 return true;
2305
2306 }
2307
2308 #define ENHANCEMENT(name, NAME) do { \
2309 if (enhancements.name) { \
2310 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
2311 !intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
2312 return false; \
2313 intel_sdvo_connector->max_##name = data_value[0]; \
2314 intel_sdvo_connector->cur_##name = response; \
2315 intel_sdvo_connector->name = \
2316 drm_property_create(dev, DRM_MODE_PROP_RANGE, #name, 2); \
2317 if (!intel_sdvo_connector->name) return false; \
2318 intel_sdvo_connector->name->values[0] = 0; \
2319 intel_sdvo_connector->name->values[1] = data_value[0]; \
2320 drm_connector_attach_property(connector, \
2321 intel_sdvo_connector->name, \
2322 intel_sdvo_connector->cur_##name); \
2323 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
2324 data_value[0], data_value[1], response); \
2325 } \
2326 } while(0)
2327
2328 static bool
intel_sdvo_create_enhance_property_tv(struct intel_sdvo * intel_sdvo,struct intel_sdvo_connector * intel_sdvo_connector,struct intel_sdvo_enhancements_reply enhancements)2329 intel_sdvo_create_enhance_property_tv(struct intel_sdvo *intel_sdvo,
2330 struct intel_sdvo_connector *intel_sdvo_connector,
2331 struct intel_sdvo_enhancements_reply enhancements)
2332 {
2333 struct drm_device *dev = intel_sdvo->base.base.dev;
2334 struct drm_connector *connector = &intel_sdvo_connector->base.base;
2335 uint16_t response, data_value[2];
2336
2337 /* when horizontal overscan is supported, Add the left/right property */
2338 if (enhancements.overscan_h) {
2339 if (!intel_sdvo_get_value(intel_sdvo,
2340 SDVO_CMD_GET_MAX_OVERSCAN_H,
2341 &data_value, 4))
2342 return false;
2343
2344 if (!intel_sdvo_get_value(intel_sdvo,
2345 SDVO_CMD_GET_OVERSCAN_H,
2346 &response, 2))
2347 return false;
2348
2349 intel_sdvo_connector->max_hscan = data_value[0];
2350 intel_sdvo_connector->left_margin = data_value[0] - response;
2351 intel_sdvo_connector->right_margin = intel_sdvo_connector->left_margin;
2352 intel_sdvo_connector->left =
2353 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2354 "left_margin", 2);
2355 if (!intel_sdvo_connector->left)
2356 return false;
2357
2358 intel_sdvo_connector->left->values[0] = 0;
2359 intel_sdvo_connector->left->values[1] = data_value[0];
2360 drm_connector_attach_property(connector,
2361 intel_sdvo_connector->left,
2362 intel_sdvo_connector->left_margin);
2363
2364 intel_sdvo_connector->right =
2365 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2366 "right_margin", 2);
2367 if (!intel_sdvo_connector->right)
2368 return false;
2369
2370 intel_sdvo_connector->right->values[0] = 0;
2371 intel_sdvo_connector->right->values[1] = data_value[0];
2372 drm_connector_attach_property(connector,
2373 intel_sdvo_connector->right,
2374 intel_sdvo_connector->right_margin);
2375 DRM_DEBUG_KMS("h_overscan: max %d, "
2376 "default %d, current %d\n",
2377 data_value[0], data_value[1], response);
2378 }
2379
2380 if (enhancements.overscan_v) {
2381 if (!intel_sdvo_get_value(intel_sdvo,
2382 SDVO_CMD_GET_MAX_OVERSCAN_V,
2383 &data_value, 4))
2384 return false;
2385
2386 if (!intel_sdvo_get_value(intel_sdvo,
2387 SDVO_CMD_GET_OVERSCAN_V,
2388 &response, 2))
2389 return false;
2390
2391 intel_sdvo_connector->max_vscan = data_value[0];
2392 intel_sdvo_connector->top_margin = data_value[0] - response;
2393 intel_sdvo_connector->bottom_margin = intel_sdvo_connector->top_margin;
2394 intel_sdvo_connector->top =
2395 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2396 "top_margin", 2);
2397 if (!intel_sdvo_connector->top)
2398 return false;
2399
2400 intel_sdvo_connector->top->values[0] = 0;
2401 intel_sdvo_connector->top->values[1] = data_value[0];
2402 drm_connector_attach_property(connector,
2403 intel_sdvo_connector->top,
2404 intel_sdvo_connector->top_margin);
2405
2406 intel_sdvo_connector->bottom =
2407 drm_property_create(dev, DRM_MODE_PROP_RANGE,
2408 "bottom_margin", 2);
2409 if (!intel_sdvo_connector->bottom)
2410 return false;
2411
2412 intel_sdvo_connector->bottom->values[0] = 0;
2413 intel_sdvo_connector->bottom->values[1] = data_value[0];
2414 drm_connector_attach_property(connector,
2415 intel_sdvo_connector->bottom,
2416 intel_sdvo_connector->bottom_margin);
2417 DRM_DEBUG_KMS("v_overscan: max %d, "
2418 "default %d, current %d\n",
2419 data_value[0], data_value[1], response);
2420 }
2421
2422 ENHANCEMENT(hpos, HPOS);
2423 ENHANCEMENT(vpos, VPOS);
2424 ENHANCEMENT(saturation, SATURATION);
2425 ENHANCEMENT(contrast, CONTRAST);
2426 ENHANCEMENT(hue, HUE);
2427 ENHANCEMENT(sharpness, SHARPNESS);
2428 ENHANCEMENT(brightness, BRIGHTNESS);
2429 ENHANCEMENT(flicker_filter, FLICKER_FILTER);
2430 ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
2431 ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D);
2432 ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER);
2433 ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER);
2434
2435 if (enhancements.dot_crawl) {
2436 if (!intel_sdvo_get_value(intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
2437 return false;
2438
2439 intel_sdvo_connector->max_dot_crawl = 1;
2440 intel_sdvo_connector->cur_dot_crawl = response & 0x1;
2441 intel_sdvo_connector->dot_crawl =
2442 drm_property_create(dev, DRM_MODE_PROP_RANGE, "dot_crawl", 2);
2443 if (!intel_sdvo_connector->dot_crawl)
2444 return false;
2445
2446 intel_sdvo_connector->dot_crawl->values[0] = 0;
2447 intel_sdvo_connector->dot_crawl->values[1] = 1;
2448 drm_connector_attach_property(connector,
2449 intel_sdvo_connector->dot_crawl,
2450 intel_sdvo_connector->cur_dot_crawl);
2451 DRM_DEBUG_KMS("dot crawl: current %d\n", response);
2452 }
2453
2454 return true;
2455 }
2456
2457 static bool
intel_sdvo_create_enhance_property_lvds(struct intel_sdvo * intel_sdvo,struct intel_sdvo_connector * intel_sdvo_connector,struct intel_sdvo_enhancements_reply enhancements)2458 intel_sdvo_create_enhance_property_lvds(struct intel_sdvo *intel_sdvo,
2459 struct intel_sdvo_connector *intel_sdvo_connector,
2460 struct intel_sdvo_enhancements_reply enhancements)
2461 {
2462 struct drm_device *dev = intel_sdvo->base.base.dev;
2463 struct drm_connector *connector = &intel_sdvo_connector->base.base;
2464 uint16_t response, data_value[2];
2465
2466 ENHANCEMENT(brightness, BRIGHTNESS);
2467
2468 return true;
2469 }
2470 #undef ENHANCEMENT
2471
intel_sdvo_create_enhance_property(struct intel_sdvo * intel_sdvo,struct intel_sdvo_connector * intel_sdvo_connector)2472 static bool intel_sdvo_create_enhance_property(struct intel_sdvo *intel_sdvo,
2473 struct intel_sdvo_connector *intel_sdvo_connector)
2474 {
2475 union {
2476 struct intel_sdvo_enhancements_reply reply;
2477 uint16_t response;
2478 } enhancements;
2479
2480 BUILD_BUG_ON(sizeof(enhancements) != 2);
2481
2482 enhancements.response = 0;
2483 intel_sdvo_get_value(intel_sdvo,
2484 SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
2485 &enhancements, sizeof(enhancements));
2486 if (enhancements.response == 0) {
2487 DRM_DEBUG_KMS("No enhancement is supported\n");
2488 return true;
2489 }
2490
2491 if (IS_TV(intel_sdvo_connector))
2492 return intel_sdvo_create_enhance_property_tv(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2493 else if(IS_LVDS(intel_sdvo_connector))
2494 return intel_sdvo_create_enhance_property_lvds(intel_sdvo, intel_sdvo_connector, enhancements.reply);
2495 else
2496 return true;
2497 }
2498
intel_sdvo_ddc_proxy_xfer(struct i2c_adapter * adapter,struct i2c_msg * msgs,int num)2499 static int intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter,
2500 struct i2c_msg *msgs,
2501 int num)
2502 {
2503 struct intel_sdvo *sdvo = adapter->algo_data;
2504
2505 if (!intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
2506 return -EIO;
2507
2508 return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num);
2509 }
2510
intel_sdvo_ddc_proxy_func(struct i2c_adapter * adapter)2511 static u32 intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter)
2512 {
2513 struct intel_sdvo *sdvo = adapter->algo_data;
2514 return sdvo->i2c->algo->functionality(sdvo->i2c);
2515 }
2516
2517 static const struct i2c_algorithm intel_sdvo_ddc_proxy = {
2518 .master_xfer = intel_sdvo_ddc_proxy_xfer,
2519 .functionality = intel_sdvo_ddc_proxy_func
2520 };
2521
2522 static bool
intel_sdvo_init_ddc_proxy(struct intel_sdvo * sdvo,struct drm_device * dev)2523 intel_sdvo_init_ddc_proxy(struct intel_sdvo *sdvo,
2524 struct drm_device *dev)
2525 {
2526 sdvo->ddc.owner = THIS_MODULE;
2527 sdvo->ddc.class = I2C_CLASS_DDC;
2528 snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy");
2529 sdvo->ddc.dev.parent = &dev->pdev->dev;
2530 sdvo->ddc.algo_data = sdvo;
2531 sdvo->ddc.algo = &intel_sdvo_ddc_proxy;
2532
2533 return i2c_add_adapter(&sdvo->ddc) == 0;
2534 }
2535
intel_sdvo_init(struct drm_device * dev,int sdvo_reg)2536 bool intel_sdvo_init(struct drm_device *dev, int sdvo_reg)
2537 {
2538 struct drm_i915_private *dev_priv = dev->dev_private;
2539 struct intel_encoder *intel_encoder;
2540 struct intel_sdvo *intel_sdvo;
2541 int i;
2542
2543 intel_sdvo = kzalloc(sizeof(struct intel_sdvo), GFP_KERNEL);
2544 if (!intel_sdvo)
2545 return false;
2546
2547 if (!intel_sdvo_init_ddc_proxy(intel_sdvo, dev)) {
2548 kfree(intel_sdvo);
2549 return false;
2550 }
2551
2552 intel_sdvo->sdvo_reg = sdvo_reg;
2553
2554 intel_encoder = &intel_sdvo->base;
2555 intel_encoder->type = INTEL_OUTPUT_SDVO;
2556 /* encoder type will be decided later */
2557 drm_encoder_init(dev, &intel_encoder->base, &intel_sdvo_enc_funcs, 0);
2558
2559 intel_sdvo->slave_addr = intel_sdvo_get_slave_addr(dev, sdvo_reg) >> 1;
2560 intel_sdvo_select_i2c_bus(dev_priv, intel_sdvo, sdvo_reg);
2561
2562 /* Read the regs to test if we can talk to the device */
2563 for (i = 0; i < 0x40; i++) {
2564 u8 byte;
2565
2566 if (!intel_sdvo_read_byte(intel_sdvo, i, &byte)) {
2567 DRM_DEBUG_KMS("No SDVO device found on SDVO%c\n",
2568 IS_SDVOB(sdvo_reg) ? 'B' : 'C');
2569 goto err;
2570 }
2571 }
2572
2573 if (IS_SDVOB(sdvo_reg))
2574 dev_priv->hotplug_supported_mask |= SDVOB_HOTPLUG_INT_STATUS;
2575 else
2576 dev_priv->hotplug_supported_mask |= SDVOC_HOTPLUG_INT_STATUS;
2577
2578 drm_encoder_helper_add(&intel_encoder->base, &intel_sdvo_helper_funcs);
2579
2580 /* In default case sdvo lvds is false */
2581 if (!intel_sdvo_get_capabilities(intel_sdvo, &intel_sdvo->caps))
2582 goto err;
2583
2584 if (intel_sdvo_output_setup(intel_sdvo,
2585 intel_sdvo->caps.output_flags) != true) {
2586 DRM_DEBUG_KMS("SDVO output failed to setup on SDVO%c\n",
2587 IS_SDVOB(sdvo_reg) ? 'B' : 'C');
2588 goto err;
2589 }
2590
2591 intel_sdvo_select_ddc_bus(dev_priv, intel_sdvo, sdvo_reg);
2592
2593 /* Set the input timing to the screen. Assume always input 0. */
2594 if (!intel_sdvo_set_target_input(intel_sdvo))
2595 goto err;
2596
2597 if (!intel_sdvo_get_input_pixel_clock_range(intel_sdvo,
2598 &intel_sdvo->pixel_clock_min,
2599 &intel_sdvo->pixel_clock_max))
2600 goto err;
2601
2602 DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
2603 "clock range %dMHz - %dMHz, "
2604 "input 1: %c, input 2: %c, "
2605 "output 1: %c, output 2: %c\n",
2606 SDVO_NAME(intel_sdvo),
2607 intel_sdvo->caps.vendor_id, intel_sdvo->caps.device_id,
2608 intel_sdvo->caps.device_rev_id,
2609 intel_sdvo->pixel_clock_min / 1000,
2610 intel_sdvo->pixel_clock_max / 1000,
2611 (intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
2612 (intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
2613 /* check currently supported outputs */
2614 intel_sdvo->caps.output_flags &
2615 (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
2616 intel_sdvo->caps.output_flags &
2617 (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
2618 return true;
2619
2620 err:
2621 drm_encoder_cleanup(&intel_encoder->base);
2622 i2c_del_adapter(&intel_sdvo->ddc);
2623 kfree(intel_sdvo);
2624
2625 return false;
2626 }
2627