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Searched refs:clkdiv0 (Results 1 – 3 of 3) sorted by relevance

/linux-2.6.39/arch/arm/plat-s3c24xx/
Ds3c2443-clock.c152 unsigned long clkdiv0 = __raw_readl(S3C2443_CLKDIV0); in s3c2443_prediv_getrate() local
154 clkdiv0 &= S3C2443_CLKDIV0_PREDIV_MASK; in s3c2443_prediv_getrate()
155 clkdiv0 >>= S3C2443_CLKDIV0_PREDIV_SHIFT; in s3c2443_prediv_getrate()
157 return rate / (clkdiv0 + 1); in s3c2443_prediv_getrate()
386 unsigned long clkdiv0 = __raw_readl(S3C2443_CLKDIV0); in s3c2443_common_setup_clocks() local
402 fclk = pll / get_fdiv(clkdiv0); in s3c2443_common_setup_clocks()
404 hclk /= s3c2443_get_hdiv(clkdiv0); in s3c2443_common_setup_clocks()
405 pclk = hclk / ((clkdiv0 & S3C2443_CLKDIV0_HALF_PCLK) ? 2 : 1); in s3c2443_common_setup_clocks()
/linux-2.6.39/arch/arm/mach-s3c64xx/
Dclock.c756 u32 clkdiv0; in s3c6400_setup_clocks() local
760 clkdiv0 = __raw_readl(S3C_CLK_DIV0); in s3c6400_setup_clocks()
761 printk(KERN_DEBUG "%s: clkdiv0 = %08x\n", __func__, clkdiv0); in s3c6400_setup_clocks()
783 hclk2 = mpll / GET_DIV(clkdiv0, S3C6400_CLKDIV0_HCLK2); in s3c6400_setup_clocks()
784 hclk = hclk2 / GET_DIV(clkdiv0, S3C6400_CLKDIV0_HCLK); in s3c6400_setup_clocks()
785 pclk = hclk2 / GET_DIV(clkdiv0, S3C6400_CLKDIV0_PCLK); in s3c6400_setup_clocks()
/linux-2.6.39/arch/arm/mach-s5pv210/
Dclock.c1159 u32 clkdiv0, clkdiv1; in s5pv210_setup_clocks() local
1167 clkdiv0 = __raw_readl(S5P_CLK_DIV0); in s5pv210_setup_clocks()
1171 __func__, clkdiv0, clkdiv1); in s5pv210_setup_clocks()