Searched refs:asic_read (Results 1 – 6 of 6) sorted by relevance
33 asic_write(asic_read(ien_int_0) | enable_bit, ien_int_0); in unmask_asic_irq()36 asic_write(asic_read(ien_int_1) | enable_bit, ien_int_1); in unmask_asic_irq()39 asic_write(asic_read(ien_int_2) | enable_bit, ien_int_2); in unmask_asic_irq()42 asic_write(asic_read(ien_int_3) | enable_bit, ien_int_3); in unmask_asic_irq()58 asic_write(asic_read(ien_int_0) & disable_mask, ien_int_0); in mask_asic_irq()61 asic_write(asic_read(ien_int_1) & disable_mask, ien_int_1); in mask_asic_irq()64 asic_write(asic_read(ien_int_2) & disable_mask, ien_int_2); in mask_asic_irq()67 asic_write(asic_read(ien_int_3) & disable_mask, ien_int_3); in mask_asic_irq()
291 chipversion = asic_read(chipver3) << 24; in configure_platform()292 chipversion |= asic_read(chipver2) << 16; in configure_platform()293 chipversion |= asic_read(chipver1) << 8; in configure_platform()294 chipversion |= asic_read(chipver0); in configure_platform()
50 irq = (asic_read(int_int_scan) >> 4) - 1; in get_int()
121 #define asic_read(x) readl(asic_reg_addr(x)) macro
44 pll_reg = asic_read(mips_pll_setup); in mips_get_pll_freq()
247 old = asic_read(crt_spare); in usb_eye_configure()