1 #ifndef __RTL8712_CMDCTRL_BITDEF_H__
2 #define __RTL8712_CMDCTRL_BITDEF_H__
3 
4 /*
5  * 2. Command Control Registers	 (Offset: 0x0040 - 0x004F)*/
6 /*--------------------------------------------------------------------------*/
7 /*       8192S (CMD) command register bits	(Offset 0x40, 16 bits)*/
8 /*--------------------------------------------------------------------------*/
9 #define		_APSDOFF_STATUS		BIT(15)
10 #define		_APSDOFF		BIT(14)
11 #define		_BBRSTn			BIT(13)  /*Enable OFDM/CCK*/
12 #define		_BB_GLB_RSTn		BIT(12)   /*Enable BB*/
13 #define		_SCHEDULE_EN		BIT(10)  /*Enable MAC scheduler*/
14 #define		_MACRXEN		BIT(9)
15 #define		_MACTXEN		BIT(8)
16 #define		_DDMA_EN		BIT(7)  /*FW off load function enable*/
17 #define		_FW2HW_EN		BIT(6)  /*MAC every module reset */
18 #define		_RXDMA_EN		BIT(5)
19 #define		_TXDMA_EN		BIT(4)
20 #define		_HCI_RXDMA_EN		BIT(3)
21 #define		_HCI_TXDMA_EN		BIT(2)
22 
23 /*TXPAUSE*/
24 #define	_STOPHCCA			BIT(6)
25 #define	_STOPHIGH			BIT(5)
26 #define	_STOPMGT			BIT(4)
27 #define	_STOPVO				BIT(3)
28 #define	_STOPVI				BIT(2)
29 #define	_STOPBE				BIT(1)
30 #define	_STOPBK				BIT(0)
31 
32 /*TCR*/
33 #define	_DISCW				BIT(20)
34 #define	_ICV				BIT(19)
35 #define	_CFEND_FMT			BIT(17)
36 #define	_CRC				BIT(16)
37 #define	_FWRDY				BIT(7)
38 #define _BASECHG			BIT(6)
39 #define	_IMEM_RDY			BIT(5)
40 #define _DMEM_CODE_DONE			BIT(4)
41 #define _EMEM_CHK_RPT			BIT(3)
42 #define _EMEM_CODE_DONE			BIT(2)
43 #define _IMEM_CHK_RPT			BIT(1)
44 #define _IMEM_CODE_DONE			BIT(0)
45 
46 #define	_TXDMA_INIT_VALUE	(_IMEM_CHK_RPT|_EMEM_CHK_RPT)
47 
48 /*RCR*/
49 #define	_ENMBID				BIT(27)
50 #define	_APP_PHYST_RXFF			BIT(25)
51 #define	_APP_PHYST_STAFF		BIT(24)
52 #define	_CBSSID				BIT(23)
53 #define	_APWRMGT			BIT(22)
54 #define	_ADD3				BIT(21)
55 #define	_AMF				BIT(20)
56 #define	_ACF				BIT(19)
57 #define	_ADF				BIT(18)
58 #define	_APP_MIC			BIT(17)
59 #define	_APP_ICV			BIT(16)
60 #define	_RXFTH_MSK			0x0000E000
61 #define	_RXFTH_SHT			13
62 #define	_AICV				BIT(12)
63 #define	_RXPKTLMT_MSK			0x00000FC0
64 #define	_RXPKTLMT_SHT			6
65 #define	_ACRC32				BIT(5)
66 #define	_AB				BIT(3)
67 #define	_AM				BIT(2)
68 #define	_APM				BIT(1)
69 #define	_AAP				BIT(0)
70 
71 /*MSR*/
72 #define	_NETTYPE_MSK			0x03
73 #define	_NETTYPE_SHT			0
74 
75 /*BT*/
76 #define _BTMODE_MSK			0x06
77 #define _BTMODE_SHT			1
78 #define _ENBT				BIT(0)
79 
80 /*MBIDCTRL*/
81 #define	_ENMBID_MODE			BIT(15)
82 #define	_BCNNO_MSK			0x7000
83 #define	_BCNNO_SHT			12
84 #define	_BCNSPACE_MSK			0x0FFF
85 #define	_BCNSPACE_SHT			0
86 
87 
88 #endif /* __RTL8712_CMDCTRL_BITDEF_H__*/
89 
90