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Searched refs:UFWP (Results 1 – 8 of 8) sorted by relevance

/linux-2.6.39/drivers/staging/rtl8192u/
Dr8192U_hw.h329 UFWP = 0x318, enumerator
Dr8192U_dm.c494 write_nic_byte(dev, UFWP, 1); in dm_check_rate_adaptive()
1745 write_nic_byte(dev, UFWP, 1); in dm_restore_dynamic_mechanism_state()
1769 rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x8); // Only clear byte 1 and rewrite. in dm_bb_initialgain_restore()
1784 rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x1); // Only clear byte 1 and rewrite. in dm_bb_initialgain_restore()
1811 rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x8); // Only clear byte 1 and rewrite. in dm_bb_initialgain_backup()
2105 rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x8); // Only clear byte 1 and rewrite. in dm_ctrl_initgain_byrssi_by_driverrssi()
2145 rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x1); // Only clear byte 1 and rewrite. in dm_ctrl_initgain_byrssi_by_fwfalse_alarm()
2184 rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x8); // Only clear byte 1 and rewrite. in dm_ctrl_initgain_byrssi_by_fwfalse_alarm()
2293 rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x1); // Only clear byte 1 and rewrite. in dm_ctrl_initgain_byrssi_by_fwfalse_alarm()
Dr819xU_phy.c1714 rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x8); // FW DIG OFF in InitialGainOperateWorkItemCallBack()
1740 rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x8); // FW DIG OFF in InitialGainOperateWorkItemCallBack()
1766 rtl8192_setBBreg(dev, UFWP, bMaskByte1, 0x1); // FW DIG ON in InitialGainOperateWorkItemCallBack()
Dr8192U_core.c2577 write_nic_byte(dev, UFWP, 1); in rtl8192_update_ratr_table()
3274 write_nic_byte(dev, UFWP, 1); in rtl8192_hwconfig()
4020 write_nic_byte(dev, UFWP, 1); in rtl819x_ifsilentreset()
/linux-2.6.39/drivers/staging/rtl8192e/
Dr8192E_dm.c326 write_nic_byte(priv, UFWP, 1); in dm_check_rate_adaptive()
1167 rtl8192_setBBreg(priv, UFWP, bMaskByte1, 0x8); // Only clear byte 1 and rewrite. in dm_ctrl_initgain_byrssi_by_driverrssi()
1202 rtl8192_setBBreg(priv, UFWP, bMaskByte1, 0x1); // Only clear byte 1 and rewrite. in dm_ctrl_initgain_byrssi_by_fwfalse_alarm()
1237 rtl8192_setBBreg(priv, UFWP, bMaskByte1, 0x8); // Only clear byte 1 and rewrite. in dm_ctrl_initgain_byrssi_by_fwfalse_alarm()
1321 rtl8192_setBBreg(priv, UFWP, bMaskByte1, 0x1); // Only clear byte 1 and rewrite. in dm_ctrl_initgain_byrssi_by_fwfalse_alarm()
Dr8192E_hw.h427 UFWP = 0x318, enumerator
Dr819xE_phy.c2172 rtl8192_setBBreg(priv, UFWP, bMaskByte1, 0x8); // FW DIG OFF in InitialGain819xPci()
2198 rtl8192_setBBreg(priv, UFWP, bMaskByte1, 0x8); // FW DIG OFF in InitialGain819xPci()
2217 rtl8192_setBBreg(priv, UFWP, bMaskByte1, 0x1); // FW DIG ON in InitialGain819xPci()
Dr8192E_core.c1716 write_nic_byte(priv, UFWP, 1); in rtl8192_update_ratr_table()
2480 write_nic_byte(priv, UFWP, 1); in rtl8192_hwconfig()