Searched refs:TimerInt (Results 1 – 6 of 6) sorted by relevance
580 if (csr5 & (TxNoBuf | TxDied | TxIntr | TimerInt)) { in tulip_interrupt()718 if (csr5 & TimerInt) { in tulip_interrupt()746 … iowrite32(((~csr5) & 0x0001ebef) | AbnormalIntr | TimerInt, ioaddr + CSR7); in tulip_interrupt()764 TimerInt | in tulip_interrupt()792 iowrite32(tulip_tbl[tp->chip_id].valid_intrs | TimerInt,794 iowrite32(TimerInt, ioaddr + CSR5);
143 TimerInt = 0x800, enumerator
1154 TimerInt | TxDied)) in intr_handler()1165 iowrite32(AbnormalIntr | TimerInt, ioaddr + IntrEnable); in intr_handler()1323 if (intr_status & TimerInt) { in netdev_error()
193 #define TimerInt 0x0048 macro
3971 write_nic_dword(dev, TimerInt, 0); in rtl8180_interrupt()
307 TimerInt = 0x54, enumerator