1 //------------------------------------------------------------------------------ 2 // Copyright (c) 2004-2010 Atheros Corporation. All rights reserved. 3 // 4 // 5 // Permission to use, copy, modify, and/or distribute this software for any 6 // purpose with or without fee is hereby granted, provided that the above 7 // copyright notice and this permission notice appear in all copies. 8 // 9 // THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES 10 // WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF 11 // MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR 12 // ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES 13 // WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN 14 // ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF 15 // OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. 16 // 17 // 18 // 19 // Author(s): ="Atheros" 20 //------------------------------------------------------------------------------ 21 22 #ifndef __ADDRS_H__ 23 #define __ADDRS_H__ 24 25 /* 26 * Special AR6002 Addresses that may be needed by special 27 * applications (e.g. ART) on the Host as well as Target. 28 */ 29 30 #if defined(AR6002_REV2) 31 #define AR6K_RAM_START 0x00500000 32 #define TARG_RAM_OFFSET(vaddr) ((u32)(vaddr) & 0xfffff) 33 #define TARG_RAM_SZ (184*1024) 34 #define TARG_ROM_SZ (80*1024) 35 #endif 36 #if defined(AR6002_REV4) || defined(AR6003) 37 #define AR6K_RAM_START 0x00540000 38 #define TARG_RAM_OFFSET(vaddr) (((u32)(vaddr) & 0xfffff) - 0x40000) 39 #define TARG_RAM_SZ (256*1024) 40 #define TARG_ROM_SZ (256*1024) 41 #endif 42 43 #define AR6002_BOARD_DATA_SZ 768 44 #define AR6002_BOARD_EXT_DATA_SZ 0 45 #define AR6003_BOARD_DATA_SZ 1024 46 #define AR6003_BOARD_EXT_DATA_SZ 768 47 48 #define AR6K_RAM_ADDR(byte_offset) (AR6K_RAM_START+(byte_offset)) 49 #define TARG_RAM_ADDRS(byte_offset) AR6K_RAM_ADDR(byte_offset) 50 51 #define AR6K_ROM_START 0x004e0000 52 #define TARG_ROM_OFFSET(vaddr) (((u32)(vaddr) & 0x1fffff) - 0xe0000) 53 #define AR6K_ROM_ADDR(byte_offset) (AR6K_ROM_START+(byte_offset)) 54 #define TARG_ROM_ADDRS(byte_offset) AR6K_ROM_ADDR(byte_offset) 55 56 /* 57 * At this ROM address is a pointer to the start of the ROM DataSet Index. 58 * If there are no ROM DataSets, there's a 0 at this address. 59 */ 60 #define ROM_DATASET_INDEX_ADDR (TARG_ROM_ADDRS(TARG_ROM_SZ)-8) 61 #define ROM_MBIST_CKSUM_ADDR (TARG_ROM_ADDRS(TARG_ROM_SZ)-4) 62 63 /* 64 * The API A_BOARD_DATA_ADDR() is the proper way to get a read pointer to 65 * board data. 66 */ 67 68 /* Size of Board Data, in bytes */ 69 #if defined(AR6002_REV4) || defined(AR6003) 70 #define BOARD_DATA_SZ AR6003_BOARD_DATA_SZ 71 #else 72 #define BOARD_DATA_SZ AR6002_BOARD_DATA_SZ 73 #endif 74 75 76 /* 77 * Constants used by ASM code to access fields of host_interest_s, 78 * which is at a fixed location in RAM. 79 */ 80 #if defined(AR6002_REV4) || defined(AR6003) 81 #define HOST_INTEREST_FLASH_IS_PRESENT_ADDR (AR6K_RAM_START + 0x60c) 82 #else 83 #define HOST_INTEREST_FLASH_IS_PRESENT_ADDR (AR6K_RAM_START + 0x40c) 84 #endif 85 #define FLASH_IS_PRESENT_TARGADDR HOST_INTEREST_FLASH_IS_PRESENT_ADDR 86 87 #endif /* __ADDRS_H__ */ 88 89 90 91