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Searched refs:SPORT2_RCLKDIV (Results 1 – 4 of 4) sorted by relevance

/linux-2.6.39/arch/blackfin/mach-bf538/include/mach/
DdefBF538.h746 #define SPORT2_RCLKDIV 0xFFC02528 /* SPORT2 Receive Clock Divider */ macro
DcdefBF538.h320 #define bfin_read_SPORT2_RCLKDIV() bfin_read16(SPORT2_RCLKDIV)
321 #define bfin_write_SPORT2_RCLKDIV(val) bfin_write16(SPORT2_RCLKDIV, val)
/linux-2.6.39/arch/blackfin/mach-bf548/include/mach/
DdefBF54x_base.h983 #define SPORT2_RCLKDIV 0xffc02528 /* SPORT2 Receive Serial Clock Divider Regis… macro
DcdefBF54x_base.h1683 #define bfin_read_SPORT2_RCLKDIV() bfin_read16(SPORT2_RCLKDIV)
1684 #define bfin_write_SPORT2_RCLKDIV(val) bfin_write16(SPORT2_RCLKDIV, val)